Merge ca8bed31ed ("ksmbd: fix null pointer dereference in alloc_preauth_hash()") into android16-6.12
Steps on the way to 6.12.23 Change-Id: I6a9dca651d1ea25811d70cb902debb45a951ef8c Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
@@ -125,13 +125,13 @@
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__vectors_lma = .; \
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OVERLAY 0xffff0000 : NOCROSSREFS AT(__vectors_lma) { \
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.vectors { \
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*(.vectors) \
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OVERLAY_KEEP(*(.vectors)) \
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} \
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.vectors.bhb.loop8 { \
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*(.vectors.bhb.loop8) \
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OVERLAY_KEEP(*(.vectors.bhb.loop8)) \
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} \
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.vectors.bhb.bpiall { \
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*(.vectors.bhb.bpiall) \
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OVERLAY_KEEP(*(.vectors.bhb.bpiall)) \
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} \
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} \
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ARM_LMA(__vectors, .vectors); \
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@@ -8,6 +8,8 @@
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#define L1_CACHE_SHIFT CONFIG_L1_CACHE_SHIFT
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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#define ARCH_DMA_MINALIGN (16)
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#define __read_mostly __section(".data..read_mostly")
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#endif /* _ASM_CACHE_H */
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@@ -53,7 +53,7 @@ void spurious_interrupt(void);
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#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
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void arch_trigger_cpumask_backtrace(const struct cpumask *mask, int exclude_cpu);
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#define MAX_IO_PICS 2
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#define MAX_IO_PICS 8
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#define NR_IRQS (64 + NR_VECTORS * (NR_CPUS + MAX_IO_PICS))
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struct acpi_vector_group {
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@@ -142,6 +142,8 @@ static void build_prologue(struct jit_ctx *ctx)
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*/
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if (seen_tail_call(ctx) && seen_call(ctx))
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move_reg(ctx, TCC_SAVED, REG_TCC);
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else
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emit_insn(ctx, nop);
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ctx->stack_size = stack_adjust;
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}
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@@ -905,7 +907,10 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
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move_addr(ctx, t1, func_addr);
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emit_insn(ctx, jirl, LOONGARCH_GPR_RA, t1, 0);
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move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0);
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if (insn->src_reg != BPF_PSEUDO_CALL)
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move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0);
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break;
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/* tail call */
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@@ -930,7 +935,10 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
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{
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const u64 imm64 = (u64)(insn + 1)->imm << 32 | (u32)insn->imm;
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move_imm(ctx, dst, imm64, is32);
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if (bpf_pseudo_func(insn))
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move_addr(ctx, dst, imm64);
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else
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move_imm(ctx, dst, imm64, is32);
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return 1;
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}
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@@ -27,6 +27,11 @@ struct jit_data {
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struct jit_ctx ctx;
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};
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static inline void emit_nop(union loongarch_instruction *insn)
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{
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insn->word = INSN_NOP;
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}
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#define emit_insn(ctx, func, ...) \
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do { \
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if (ctx->image != NULL) { \
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@@ -895,6 +895,7 @@ config INTEL_TDX_GUEST
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depends on X86_64 && CPU_SUP_INTEL
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depends on X86_X2APIC
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depends on EFI_STUB
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depends on PARAVIRT
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select ARCH_HAS_CC_PLATFORM
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select X86_MEM_ENCRYPT
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select X86_MCE
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@@ -368,7 +368,7 @@ config X86_HAVE_PAE
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config X86_CMPXCHG64
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def_bool y
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depends on X86_HAVE_PAE || M586TSC || M586MMX || MK6 || MK7
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depends on X86_HAVE_PAE || M586TSC || M586MMX || MK6 || MK7 || MGEODEGX1 || MGEODE_LX
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# this should be set for all -march=.. options where the compiler
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# generates cmov.
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+25
-1
@@ -14,6 +14,7 @@
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#include <asm/ia32.h>
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#include <asm/insn.h>
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#include <asm/insn-eval.h>
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#include <asm/paravirt_types.h>
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#include <asm/pgtable.h>
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#include <asm/set_memory.h>
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#include <asm/traps.h>
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@@ -359,7 +360,7 @@ static int handle_halt(struct ve_info *ve)
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return ve_instr_len(ve);
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}
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void __cpuidle tdx_safe_halt(void)
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void __cpuidle tdx_halt(void)
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{
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const bool irq_disabled = false;
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@@ -370,6 +371,16 @@ void __cpuidle tdx_safe_halt(void)
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WARN_ONCE(1, "HLT instruction emulation failed\n");
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}
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static void __cpuidle tdx_safe_halt(void)
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{
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tdx_halt();
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/*
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* "__cpuidle" section doesn't support instrumentation, so stick
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* with raw_* variant that avoids tracing hooks.
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*/
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raw_local_irq_enable();
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}
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static int read_msr(struct pt_regs *regs, struct ve_info *ve)
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{
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struct tdx_module_args args = {
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@@ -1056,6 +1067,19 @@ void __init tdx_early_init(void)
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x86_platform.guest.enc_kexec_begin = tdx_kexec_begin;
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x86_platform.guest.enc_kexec_finish = tdx_kexec_finish;
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/*
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* Avoid "sti;hlt" execution in TDX guests as HLT induces a #VE that
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* will enable interrupts before HLT TDCALL invocation if executed
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* in STI-shadow, possibly resulting in missed wakeup events.
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*
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* Modify all possible HLT execution paths to use TDX specific routines
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* that directly execute TDCALL and toggle the interrupt state as
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* needed after TDCALL completion. This also reduces HLT related #VEs
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* in addition to having a reliable halt logic execution.
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*/
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pv_ops.irq.safe_halt = tdx_safe_halt;
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pv_ops.irq.halt = tdx_halt;
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/*
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* TDX intercepts the RDMSR to read the X2APIC ID in the parallel
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* bringup low level code. That raises #VE which cannot be handled
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@@ -2779,28 +2779,33 @@ static u64 icl_update_topdown_event(struct perf_event *event)
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DEFINE_STATIC_CALL(intel_pmu_update_topdown_event, x86_perf_event_update);
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static void intel_pmu_read_topdown_event(struct perf_event *event)
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{
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struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
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/* Only need to call update_topdown_event() once for group read. */
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if ((cpuc->txn_flags & PERF_PMU_TXN_READ) &&
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!is_slots_event(event))
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return;
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perf_pmu_disable(event->pmu);
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static_call(intel_pmu_update_topdown_event)(event);
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perf_pmu_enable(event->pmu);
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}
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static void intel_pmu_read_event(struct perf_event *event)
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{
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if (event->hw.flags & PERF_X86_EVENT_AUTO_RELOAD)
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intel_pmu_auto_reload_read(event);
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else if (is_topdown_count(event))
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intel_pmu_read_topdown_event(event);
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else
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x86_perf_event_update(event);
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if (event->hw.flags & (PERF_X86_EVENT_AUTO_RELOAD | PERF_X86_EVENT_TOPDOWN)) {
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struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
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bool pmu_enabled = cpuc->enabled;
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/* Only need to call update_topdown_event() once for group read. */
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if (is_metric_event(event) && (cpuc->txn_flags & PERF_PMU_TXN_READ))
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return;
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cpuc->enabled = 0;
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if (pmu_enabled)
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intel_pmu_disable_all();
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if (is_topdown_event(event))
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static_call(intel_pmu_update_topdown_event)(event);
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else
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intel_pmu_drain_pebs_buffer();
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cpuc->enabled = pmu_enabled;
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if (pmu_enabled)
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intel_pmu_enable_all(0);
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return;
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}
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x86_perf_event_update(event);
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}
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static void intel_pmu_enable_fixed(struct perf_event *event)
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@@ -3067,7 +3072,7 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)
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handled++;
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x86_pmu_handle_guest_pebs(regs, &data);
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x86_pmu.drain_pebs(regs, &data);
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static_call(x86_pmu_drain_pebs)(regs, &data);
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status &= intel_ctrl | GLOBAL_STATUS_TRACE_TOPAPMI;
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/*
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@@ -932,11 +932,11 @@ unlock:
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return 1;
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}
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static inline void intel_pmu_drain_pebs_buffer(void)
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void intel_pmu_drain_pebs_buffer(void)
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{
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struct perf_sample_data data;
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x86_pmu.drain_pebs(NULL, &data);
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static_call(x86_pmu_drain_pebs)(NULL, &data);
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}
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/*
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@@ -2079,15 +2079,6 @@ get_next_pebs_record_by_bit(void *base, void *top, int bit)
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return NULL;
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}
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void intel_pmu_auto_reload_read(struct perf_event *event)
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{
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WARN_ON(!(event->hw.flags & PERF_X86_EVENT_AUTO_RELOAD));
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perf_pmu_disable(event->pmu);
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intel_pmu_drain_pebs_buffer();
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perf_pmu_enable(event->pmu);
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}
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/*
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* Special variant of intel_pmu_save_and_restart() for auto-reload.
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*/
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@@ -1092,6 +1092,7 @@ extern struct x86_pmu x86_pmu __read_mostly;
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DECLARE_STATIC_CALL(x86_pmu_set_period, *x86_pmu.set_period);
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DECLARE_STATIC_CALL(x86_pmu_update, *x86_pmu.update);
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DECLARE_STATIC_CALL(x86_pmu_drain_pebs, *x86_pmu.drain_pebs);
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static __always_inline struct x86_perf_task_context_opt *task_context_opt(void *ctx)
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{
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@@ -1626,7 +1627,7 @@ void intel_pmu_pebs_disable_all(void);
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void intel_pmu_pebs_sched_task(struct perf_event_pmu_context *pmu_ctx, bool sched_in);
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void intel_pmu_auto_reload_read(struct perf_event *event);
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void intel_pmu_drain_pebs_buffer(void);
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void intel_pmu_store_pebs_lbrs(struct lbr_entry *lbr);
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@@ -339,7 +339,7 @@ int hv_snp_boot_ap(u32 cpu, unsigned long start_ip)
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vmsa->sev_features = sev_status >> 2;
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ret = snp_set_vmsa(vmsa, true);
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if (!ret) {
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if (ret) {
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pr_err("RMPADJUST(%llx) failed: %llx\n", (u64)vmsa, ret);
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free_page((u64)vmsa);
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return ret;
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@@ -58,7 +58,7 @@ void tdx_get_ve_info(struct ve_info *ve);
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bool tdx_handle_virt_exception(struct pt_regs *regs, struct ve_info *ve);
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|
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void tdx_safe_halt(void);
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void tdx_halt(void);
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|
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bool tdx_early_handle_ve(struct pt_regs *regs);
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@@ -69,7 +69,7 @@ u64 tdx_hcall_get_quote(u8 *buf, size_t size);
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#else
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|
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static inline void tdx_early_init(void) { };
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static inline void tdx_safe_halt(void) { };
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static inline void tdx_halt(void) { };
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|
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static inline bool tdx_early_handle_ve(struct pt_regs *regs) { return false; }
|
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|
||||
|
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@@ -242,7 +242,7 @@ void flush_tlb_multi(const struct cpumask *cpumask,
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flush_tlb_mm_range((vma)->vm_mm, start, end, \
|
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((vma)->vm_flags & VM_HUGETLB) \
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? huge_page_shift(hstate_vma(vma)) \
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: PAGE_SHIFT, false)
|
||||
: PAGE_SHIFT, true)
|
||||
|
||||
extern void flush_tlb_all(void);
|
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extern void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
|
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|
||||
@@ -300,13 +300,12 @@ static noinstr int error_context(struct mce *m, struct pt_regs *regs)
|
||||
copy_user = is_copy_from_user(regs);
|
||||
instrumentation_end();
|
||||
|
||||
switch (fixup_type) {
|
||||
case EX_TYPE_UACCESS:
|
||||
if (!copy_user)
|
||||
return IN_KERNEL;
|
||||
m->kflags |= MCE_IN_KERNEL_COPYIN;
|
||||
fallthrough;
|
||||
if (copy_user) {
|
||||
m->kflags |= MCE_IN_KERNEL_COPYIN | MCE_IN_KERNEL_RECOV;
|
||||
return IN_KERNEL_RECOV;
|
||||
}
|
||||
|
||||
switch (fixup_type) {
|
||||
case EX_TYPE_FAULT_MCE_SAFE:
|
||||
case EX_TYPE_DEFAULT_MCE_SAFE:
|
||||
m->kflags |= MCE_IN_KERNEL_RECOV;
|
||||
|
||||
@@ -600,7 +600,7 @@ static bool __apply_microcode_amd(struct microcode_amd *mc, u32 *cur_rev,
|
||||
unsigned long p_addr = (unsigned long)&mc->hdr.data_code;
|
||||
|
||||
if (!verify_sha256_digest(mc->hdr.patch_id, *cur_rev, (const u8 *)p_addr, psize))
|
||||
return -1;
|
||||
return false;
|
||||
|
||||
native_wrmsrl(MSR_AMD64_PATCH_LOADER, p_addr);
|
||||
|
||||
|
||||
@@ -938,7 +938,7 @@ void __init select_idle_routine(void)
|
||||
static_call_update(x86_idle, mwait_idle);
|
||||
} else if (cpu_feature_enabled(X86_FEATURE_TDX_GUEST)) {
|
||||
pr_info("using TDX aware idle routine\n");
|
||||
static_call_update(x86_idle, tdx_safe_halt);
|
||||
static_call_update(x86_idle, tdx_halt);
|
||||
} else {
|
||||
static_call_update(x86_idle, default_idle);
|
||||
}
|
||||
|
||||
@@ -956,7 +956,7 @@ static unsigned long long cyc2ns_suspend;
|
||||
|
||||
void tsc_save_sched_clock_state(void)
|
||||
{
|
||||
if (!sched_clock_stable())
|
||||
if (!static_branch_likely(&__use_tsc) && !sched_clock_stable())
|
||||
return;
|
||||
|
||||
cyc2ns_suspend = sched_clock();
|
||||
@@ -976,7 +976,7 @@ void tsc_restore_sched_clock_state(void)
|
||||
unsigned long flags;
|
||||
int cpu;
|
||||
|
||||
if (!sched_clock_stable())
|
||||
if (!static_branch_likely(&__use_tsc) && !sched_clock_stable())
|
||||
return;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
@@ -357,19 +357,23 @@ void *arch_uprobe_trampoline(unsigned long *psize)
|
||||
return &insn;
|
||||
}
|
||||
|
||||
static unsigned long trampoline_check_ip(void)
|
||||
static unsigned long trampoline_check_ip(unsigned long tramp)
|
||||
{
|
||||
unsigned long tramp = uprobe_get_trampoline_vaddr();
|
||||
|
||||
return tramp + (uretprobe_syscall_check - uretprobe_trampoline_entry);
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE0(uretprobe)
|
||||
{
|
||||
struct pt_regs *regs = task_pt_regs(current);
|
||||
unsigned long err, ip, sp, r11_cx_ax[3];
|
||||
unsigned long err, ip, sp, r11_cx_ax[3], tramp;
|
||||
|
||||
if (regs->ip != trampoline_check_ip())
|
||||
/* If there's no trampoline, we are called from wrong place. */
|
||||
tramp = uprobe_get_trampoline_vaddr();
|
||||
if (unlikely(tramp == UPROBE_NO_TRAMPOLINE_VADDR))
|
||||
goto sigill;
|
||||
|
||||
/* Make sure the ip matches the only allowed sys_uretprobe caller. */
|
||||
if (unlikely(regs->ip != trampoline_check_ip(tramp)))
|
||||
goto sigill;
|
||||
|
||||
err = copy_from_user(r11_cx_ax, (void __user *)regs->sp, sizeof(r11_cx_ax));
|
||||
|
||||
@@ -3957,16 +3957,12 @@ static int sev_snp_ap_creation(struct vcpu_svm *svm)
|
||||
|
||||
/*
|
||||
* The target vCPU is valid, so the vCPU will be kicked unless the
|
||||
* request is for CREATE_ON_INIT. For any errors at this stage, the
|
||||
* kick will place the vCPU in an non-runnable state.
|
||||
* request is for CREATE_ON_INIT.
|
||||
*/
|
||||
kick = true;
|
||||
|
||||
mutex_lock(&target_svm->sev_es.snp_vmsa_mutex);
|
||||
|
||||
target_svm->sev_es.snp_vmsa_gpa = INVALID_PAGE;
|
||||
target_svm->sev_es.snp_ap_waiting_for_reset = true;
|
||||
|
||||
/* Interrupt injection mode shouldn't change for AP creation */
|
||||
if (request < SVM_VMGEXIT_AP_DESTROY) {
|
||||
u64 sev_features;
|
||||
@@ -4012,20 +4008,23 @@ static int sev_snp_ap_creation(struct vcpu_svm *svm)
|
||||
target_svm->sev_es.snp_vmsa_gpa = svm->vmcb->control.exit_info_2;
|
||||
break;
|
||||
case SVM_VMGEXIT_AP_DESTROY:
|
||||
target_svm->sev_es.snp_vmsa_gpa = INVALID_PAGE;
|
||||
break;
|
||||
default:
|
||||
vcpu_unimpl(vcpu, "vmgexit: invalid AP creation request [%#x] from guest\n",
|
||||
request);
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
goto out;
|
||||
}
|
||||
|
||||
out:
|
||||
target_svm->sev_es.snp_ap_waiting_for_reset = true;
|
||||
|
||||
if (kick) {
|
||||
kvm_make_request(KVM_REQ_UPDATE_PROTECTED_GUEST_STATE, target_vcpu);
|
||||
kvm_vcpu_kick(target_vcpu);
|
||||
}
|
||||
|
||||
out:
|
||||
mutex_unlock(&target_svm->sev_es.snp_vmsa_mutex);
|
||||
|
||||
return ret;
|
||||
|
||||
+11
-4
@@ -4590,6 +4590,11 @@ static bool kvm_is_vm_type_supported(unsigned long type)
|
||||
return type < 32 && (kvm_caps.supported_vm_types & BIT(type));
|
||||
}
|
||||
|
||||
static inline u32 kvm_sync_valid_fields(struct kvm *kvm)
|
||||
{
|
||||
return kvm && kvm->arch.has_protected_state ? 0 : KVM_SYNC_X86_VALID_FIELDS;
|
||||
}
|
||||
|
||||
int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
|
||||
{
|
||||
int r = 0;
|
||||
@@ -4698,7 +4703,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
|
||||
break;
|
||||
#endif
|
||||
case KVM_CAP_SYNC_REGS:
|
||||
r = KVM_SYNC_X86_VALID_FIELDS;
|
||||
r = kvm_sync_valid_fields(kvm);
|
||||
break;
|
||||
case KVM_CAP_ADJUST_CLOCK:
|
||||
r = KVM_CLOCK_VALID_FLAGS;
|
||||
@@ -11470,6 +11475,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct kvm_queued_exception *ex = &vcpu->arch.exception;
|
||||
struct kvm_run *kvm_run = vcpu->run;
|
||||
u32 sync_valid_fields;
|
||||
int r;
|
||||
|
||||
r = kvm_mmu_post_init_vm(vcpu->kvm);
|
||||
@@ -11515,8 +11521,9 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
|
||||
goto out;
|
||||
}
|
||||
|
||||
if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
|
||||
(kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
|
||||
sync_valid_fields = kvm_sync_valid_fields(vcpu->kvm);
|
||||
if ((kvm_run->kvm_valid_regs & ~sync_valid_fields) ||
|
||||
(kvm_run->kvm_dirty_regs & ~sync_valid_fields)) {
|
||||
r = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
@@ -11574,7 +11581,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
|
||||
|
||||
out:
|
||||
kvm_put_guest_fpu(vcpu);
|
||||
if (kvm_run->kvm_valid_regs)
|
||||
if (kvm_run->kvm_valid_regs && likely(!vcpu->arch.guest_state_protected))
|
||||
store_regs(vcpu);
|
||||
post_kvm_run_save(vcpu);
|
||||
kvm_vcpu_srcu_read_unlock(vcpu);
|
||||
|
||||
@@ -485,7 +485,7 @@ int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
|
||||
cmd_mask = nd_desc->cmd_mask;
|
||||
if (cmd == ND_CMD_CALL && call_pkg->nd_family) {
|
||||
family = call_pkg->nd_family;
|
||||
if (family > NVDIMM_BUS_FAMILY_MAX ||
|
||||
if (call_pkg->nd_family > NVDIMM_BUS_FAMILY_MAX ||
|
||||
!test_bit(family, &nd_desc->bus_family_mask))
|
||||
return -EINVAL;
|
||||
family = array_index_nospec(family,
|
||||
|
||||
@@ -440,6 +440,13 @@ static const struct dmi_system_id irq1_level_low_skip_override[] = {
|
||||
DMI_MATCH(DMI_BOARD_NAME, "S5602ZA"),
|
||||
},
|
||||
},
|
||||
{
|
||||
/* Asus Vivobook X1404VAP */
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "X1404VAP"),
|
||||
},
|
||||
},
|
||||
{
|
||||
/* Asus Vivobook X1504VAP */
|
||||
.matches = {
|
||||
|
||||
@@ -374,7 +374,8 @@ static const struct dmi_system_id acpi_quirk_skip_dmi_ids[] = {
|
||||
DMI_MATCH(DMI_PRODUCT_VERSION, "Blade3-10A-001"),
|
||||
},
|
||||
.driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS |
|
||||
ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY),
|
||||
ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY |
|
||||
ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS),
|
||||
},
|
||||
{
|
||||
/* Medion Lifetab S10346 */
|
||||
|
||||
@@ -1269,6 +1269,7 @@ static void gfx_v9_0_check_fw_write_wait(struct amdgpu_device *adev)
|
||||
adev->gfx.mec_fw_write_wait = false;
|
||||
|
||||
if ((amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 1)) &&
|
||||
(amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 2)) &&
|
||||
((adev->gfx.mec_fw_version < 0x000001a5) ||
|
||||
(adev->gfx.mec_feature_version < 46) ||
|
||||
(adev->gfx.pfp_fw_version < 0x000000b7) ||
|
||||
|
||||
@@ -1961,6 +1961,13 @@ static int isp_attach_iommu(struct isp_device *isp)
|
||||
struct dma_iommu_mapping *mapping;
|
||||
int ret;
|
||||
|
||||
/* We always want to replace any default mapping from the arch code */
|
||||
mapping = to_dma_iommu_mapping(isp->dev);
|
||||
if (mapping) {
|
||||
arm_iommu_detach_device(isp->dev);
|
||||
arm_iommu_release_mapping(mapping);
|
||||
}
|
||||
|
||||
/*
|
||||
* Create the ARM mapping, used by the ARM DMA mapping core to allocate
|
||||
* VAs. This will allocate a corresponding IOMMU domain.
|
||||
|
||||
+13
-6
@@ -1272,19 +1272,25 @@ static int mmc_omap_new_slot(struct mmc_omap_host *host, int id)
|
||||
/* Check for some optional GPIO controls */
|
||||
slot->vsd = devm_gpiod_get_index_optional(host->dev, "vsd",
|
||||
id, GPIOD_OUT_LOW);
|
||||
if (IS_ERR(slot->vsd))
|
||||
return dev_err_probe(host->dev, PTR_ERR(slot->vsd),
|
||||
if (IS_ERR(slot->vsd)) {
|
||||
r = dev_err_probe(host->dev, PTR_ERR(slot->vsd),
|
||||
"error looking up VSD GPIO\n");
|
||||
goto err_free_host;
|
||||
}
|
||||
slot->vio = devm_gpiod_get_index_optional(host->dev, "vio",
|
||||
id, GPIOD_OUT_LOW);
|
||||
if (IS_ERR(slot->vio))
|
||||
return dev_err_probe(host->dev, PTR_ERR(slot->vio),
|
||||
if (IS_ERR(slot->vio)) {
|
||||
r = dev_err_probe(host->dev, PTR_ERR(slot->vio),
|
||||
"error looking up VIO GPIO\n");
|
||||
goto err_free_host;
|
||||
}
|
||||
slot->cover = devm_gpiod_get_index_optional(host->dev, "cover",
|
||||
id, GPIOD_IN);
|
||||
if (IS_ERR(slot->cover))
|
||||
return dev_err_probe(host->dev, PTR_ERR(slot->cover),
|
||||
if (IS_ERR(slot->cover)) {
|
||||
r = dev_err_probe(host->dev, PTR_ERR(slot->cover),
|
||||
"error looking up cover switch GPIO\n");
|
||||
goto err_free_host;
|
||||
}
|
||||
|
||||
host->slots[id] = slot;
|
||||
|
||||
@@ -1344,6 +1350,7 @@ err_remove_slot_name:
|
||||
device_remove_file(&mmc->class_dev, &dev_attr_slot_name);
|
||||
err_remove_host:
|
||||
mmc_remove_host(mmc);
|
||||
err_free_host:
|
||||
mmc_free_host(mmc);
|
||||
return r;
|
||||
}
|
||||
|
||||
@@ -1339,8 +1339,8 @@ static int sdhci_omap_probe(struct platform_device *pdev)
|
||||
/* R1B responses is required to properly manage HW busy detection. */
|
||||
mmc->caps |= MMC_CAP_NEED_RSP_BUSY;
|
||||
|
||||
/* Allow card power off and runtime PM for eMMC/SD card devices */
|
||||
mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_AGGRESSIVE_PM;
|
||||
/* Enable SDIO card power off. */
|
||||
mmc->caps |= MMC_CAP_POWER_OFF_CARD;
|
||||
|
||||
ret = sdhci_setup_host(host);
|
||||
if (ret)
|
||||
|
||||
@@ -399,6 +399,7 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
|
||||
if (!IS_ERR(pxa->clk_core))
|
||||
clk_prepare_enable(pxa->clk_core);
|
||||
|
||||
host->mmc->caps |= MMC_CAP_NEED_RSP_BUSY;
|
||||
/* enable 1/8V DDR capable */
|
||||
host->mmc->caps |= MMC_CAP_1_8V_DDR;
|
||||
|
||||
|
||||
@@ -438,7 +438,8 @@ struct idpf_q_vector {
|
||||
__cacheline_group_end_aligned(cold);
|
||||
};
|
||||
libeth_cacheline_set_assert(struct idpf_q_vector, 112,
|
||||
424 + 2 * sizeof(struct dim),
|
||||
24 + sizeof(struct napi_struct) +
|
||||
2 * sizeof(struct dim),
|
||||
8 + sizeof(cpumask_var_t));
|
||||
|
||||
struct idpf_rx_queue_stats {
|
||||
|
||||
@@ -530,7 +530,8 @@ static int rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags)
|
||||
netif_device_present (dev->net) &&
|
||||
test_bit(EVENT_DEV_OPEN, &dev->flags) &&
|
||||
!test_bit (EVENT_RX_HALT, &dev->flags) &&
|
||||
!test_bit (EVENT_DEV_ASLEEP, &dev->flags)) {
|
||||
!test_bit (EVENT_DEV_ASLEEP, &dev->flags) &&
|
||||
!usbnet_going_away(dev)) {
|
||||
switch (retval = usb_submit_urb (urb, GFP_ATOMIC)) {
|
||||
case -EPIPE:
|
||||
usbnet_defer_kevent (dev, EVENT_RX_HALT);
|
||||
@@ -551,8 +552,7 @@ static int rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags)
|
||||
tasklet_schedule (&dev->bh);
|
||||
break;
|
||||
case 0:
|
||||
if (!usbnet_going_away(dev))
|
||||
__usbnet_queue_skb(&dev->rxq, skb, rx_start);
|
||||
__usbnet_queue_skb(&dev->rxq, skb, rx_start);
|
||||
}
|
||||
} else {
|
||||
netif_dbg(dev, ifdown, dev->net, "rx: stopped\n");
|
||||
|
||||
@@ -3117,7 +3117,6 @@ __mt7925_mcu_set_clc(struct mt792x_dev *dev, u8 *alpha2,
|
||||
|
||||
.idx = idx,
|
||||
.env = env_cap,
|
||||
.acpi_conf = mt792x_acpi_get_flags(&dev->phy),
|
||||
};
|
||||
int ret, valid_cnt = 0;
|
||||
u8 i, *pos;
|
||||
|
||||
@@ -839,10 +839,8 @@ static int perf_copy_chunk(struct perf_thread *pthr,
|
||||
dma_set_unmap(tx, unmap);
|
||||
|
||||
ret = dma_submit_error(dmaengine_submit(tx));
|
||||
if (ret) {
|
||||
dmaengine_unmap_put(unmap);
|
||||
if (ret)
|
||||
goto err_free_resource;
|
||||
}
|
||||
|
||||
dmaengine_unmap_put(unmap);
|
||||
|
||||
|
||||
@@ -84,7 +84,7 @@ static DECLARE_HASHTABLE(isst_hash, 8);
|
||||
static DEFINE_MUTEX(isst_hash_lock);
|
||||
|
||||
static int isst_store_new_cmd(int cmd, u32 cpu, int mbox_cmd_type, u32 param,
|
||||
u32 data)
|
||||
u64 data)
|
||||
{
|
||||
struct isst_cmd *sst_cmd;
|
||||
|
||||
|
||||
@@ -8795,6 +8795,7 @@ static const struct attribute_group fan_driver_attr_group = {
|
||||
#define TPACPI_FAN_NS 0x0010 /* For EC with non-Standard register addresses */
|
||||
#define TPACPI_FAN_DECRPM 0x0020 /* For ECFW's with RPM in register as decimal */
|
||||
#define TPACPI_FAN_TPR 0x0040 /* Fan speed is in Ticks Per Revolution */
|
||||
#define TPACPI_FAN_NOACPI 0x0080 /* Don't use ACPI methods even if detected */
|
||||
|
||||
static const struct tpacpi_quirk fan_quirk_table[] __initconst = {
|
||||
TPACPI_QEC_IBM('1', 'Y', TPACPI_FAN_Q1),
|
||||
@@ -8825,6 +8826,9 @@ static const struct tpacpi_quirk fan_quirk_table[] __initconst = {
|
||||
TPACPI_Q_LNV3('N', '1', 'O', TPACPI_FAN_NOFAN), /* X1 Tablet (2nd gen) */
|
||||
TPACPI_Q_LNV3('R', '0', 'Q', TPACPI_FAN_DECRPM),/* L480 */
|
||||
TPACPI_Q_LNV('8', 'F', TPACPI_FAN_TPR), /* ThinkPad x120e */
|
||||
TPACPI_Q_LNV3('R', '0', '0', TPACPI_FAN_NOACPI),/* E560 */
|
||||
TPACPI_Q_LNV3('R', '1', '2', TPACPI_FAN_NOACPI),/* T495 */
|
||||
TPACPI_Q_LNV3('R', '1', '3', TPACPI_FAN_NOACPI),/* T495s */
|
||||
};
|
||||
|
||||
static int __init fan_init(struct ibm_init_struct *iibm)
|
||||
@@ -8876,6 +8880,13 @@ static int __init fan_init(struct ibm_init_struct *iibm)
|
||||
tp_features.fan_ctrl_status_undef = 1;
|
||||
}
|
||||
|
||||
if (quirks & TPACPI_FAN_NOACPI) {
|
||||
/* E560, T495, T495s */
|
||||
pr_info("Ignoring buggy ACPI fan access method\n");
|
||||
fang_handle = NULL;
|
||||
fanw_handle = NULL;
|
||||
}
|
||||
|
||||
if (gfan_handle) {
|
||||
/* 570, 600e/x, 770e, 770x */
|
||||
fan_status_access_mode = TPACPI_FAN_RD_ACPI_GFAN;
|
||||
|
||||
+152
-160
@@ -440,7 +440,7 @@ static unsigned int lpuart_get_baud_clk_rate(struct lpuart_port *sport)
|
||||
|
||||
static void lpuart_stop_tx(struct uart_port *port)
|
||||
{
|
||||
unsigned char temp;
|
||||
u8 temp;
|
||||
|
||||
temp = readb(port->membase + UARTCR2);
|
||||
temp &= ~(UARTCR2_TIE | UARTCR2_TCIE);
|
||||
@@ -449,7 +449,7 @@ static void lpuart_stop_tx(struct uart_port *port)
|
||||
|
||||
static void lpuart32_stop_tx(struct uart_port *port)
|
||||
{
|
||||
unsigned long temp;
|
||||
u32 temp;
|
||||
|
||||
temp = lpuart32_read(port, UARTCTRL);
|
||||
temp &= ~(UARTCTRL_TIE | UARTCTRL_TCIE);
|
||||
@@ -458,7 +458,7 @@ static void lpuart32_stop_tx(struct uart_port *port)
|
||||
|
||||
static void lpuart_stop_rx(struct uart_port *port)
|
||||
{
|
||||
unsigned char temp;
|
||||
u8 temp;
|
||||
|
||||
temp = readb(port->membase + UARTCR2);
|
||||
writeb(temp & ~UARTCR2_RE, port->membase + UARTCR2);
|
||||
@@ -466,7 +466,7 @@ static void lpuart_stop_rx(struct uart_port *port)
|
||||
|
||||
static void lpuart32_stop_rx(struct uart_port *port)
|
||||
{
|
||||
unsigned long temp;
|
||||
u32 temp;
|
||||
|
||||
temp = lpuart32_read(port, UARTCTRL);
|
||||
lpuart32_write(port, temp & ~UARTCTRL_RE, UARTCTRL);
|
||||
@@ -580,7 +580,7 @@ static int lpuart_dma_tx_request(struct uart_port *port)
|
||||
ret = dmaengine_slave_config(sport->dma_tx_chan, &dma_tx_sconfig);
|
||||
|
||||
if (ret) {
|
||||
dev_err(sport->port.dev,
|
||||
dev_err(port->dev,
|
||||
"DMA slave config failed, err = %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
@@ -610,13 +610,13 @@ static void lpuart_flush_buffer(struct uart_port *port)
|
||||
}
|
||||
|
||||
if (lpuart_is_32(sport)) {
|
||||
val = lpuart32_read(&sport->port, UARTFIFO);
|
||||
val = lpuart32_read(port, UARTFIFO);
|
||||
val |= UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH;
|
||||
lpuart32_write(&sport->port, val, UARTFIFO);
|
||||
lpuart32_write(port, val, UARTFIFO);
|
||||
} else {
|
||||
val = readb(sport->port.membase + UARTCFIFO);
|
||||
val = readb(port->membase + UARTCFIFO);
|
||||
val |= UARTCFIFO_TXFLUSH | UARTCFIFO_RXFLUSH;
|
||||
writeb(val, sport->port.membase + UARTCFIFO);
|
||||
writeb(val, port->membase + UARTCFIFO);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -638,38 +638,36 @@ static void lpuart32_wait_bit_set(struct uart_port *port, unsigned int offset,
|
||||
|
||||
static int lpuart_poll_init(struct uart_port *port)
|
||||
{
|
||||
struct lpuart_port *sport = container_of(port,
|
||||
struct lpuart_port, port);
|
||||
unsigned long flags;
|
||||
unsigned char temp;
|
||||
u8 temp;
|
||||
|
||||
sport->port.fifosize = 0;
|
||||
port->fifosize = 0;
|
||||
|
||||
uart_port_lock_irqsave(&sport->port, &flags);
|
||||
uart_port_lock_irqsave(port, &flags);
|
||||
/* Disable Rx & Tx */
|
||||
writeb(0, sport->port.membase + UARTCR2);
|
||||
writeb(0, port->membase + UARTCR2);
|
||||
|
||||
temp = readb(sport->port.membase + UARTPFIFO);
|
||||
temp = readb(port->membase + UARTPFIFO);
|
||||
/* Enable Rx and Tx FIFO */
|
||||
writeb(temp | UARTPFIFO_RXFE | UARTPFIFO_TXFE,
|
||||
sport->port.membase + UARTPFIFO);
|
||||
port->membase + UARTPFIFO);
|
||||
|
||||
/* flush Tx and Rx FIFO */
|
||||
writeb(UARTCFIFO_TXFLUSH | UARTCFIFO_RXFLUSH,
|
||||
sport->port.membase + UARTCFIFO);
|
||||
port->membase + UARTCFIFO);
|
||||
|
||||
/* explicitly clear RDRF */
|
||||
if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) {
|
||||
readb(sport->port.membase + UARTDR);
|
||||
writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO);
|
||||
if (readb(port->membase + UARTSR1) & UARTSR1_RDRF) {
|
||||
readb(port->membase + UARTDR);
|
||||
writeb(UARTSFIFO_RXUF, port->membase + UARTSFIFO);
|
||||
}
|
||||
|
||||
writeb(0, sport->port.membase + UARTTWFIFO);
|
||||
writeb(1, sport->port.membase + UARTRWFIFO);
|
||||
writeb(0, port->membase + UARTTWFIFO);
|
||||
writeb(1, port->membase + UARTRWFIFO);
|
||||
|
||||
/* Enable Rx and Tx */
|
||||
writeb(UARTCR2_RE | UARTCR2_TE, sport->port.membase + UARTCR2);
|
||||
uart_port_unlock_irqrestore(&sport->port, flags);
|
||||
writeb(UARTCR2_RE | UARTCR2_TE, port->membase + UARTCR2);
|
||||
uart_port_unlock_irqrestore(port, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -692,33 +690,32 @@ static int lpuart_poll_get_char(struct uart_port *port)
|
||||
static int lpuart32_poll_init(struct uart_port *port)
|
||||
{
|
||||
unsigned long flags;
|
||||
struct lpuart_port *sport = container_of(port, struct lpuart_port, port);
|
||||
u32 temp;
|
||||
|
||||
sport->port.fifosize = 0;
|
||||
port->fifosize = 0;
|
||||
|
||||
uart_port_lock_irqsave(&sport->port, &flags);
|
||||
uart_port_lock_irqsave(port, &flags);
|
||||
|
||||
/* Disable Rx & Tx */
|
||||
lpuart32_write(&sport->port, 0, UARTCTRL);
|
||||
lpuart32_write(port, 0, UARTCTRL);
|
||||
|
||||
temp = lpuart32_read(&sport->port, UARTFIFO);
|
||||
temp = lpuart32_read(port, UARTFIFO);
|
||||
|
||||
/* Enable Rx and Tx FIFO */
|
||||
lpuart32_write(&sport->port, temp | UARTFIFO_RXFE | UARTFIFO_TXFE, UARTFIFO);
|
||||
lpuart32_write(port, temp | UARTFIFO_RXFE | UARTFIFO_TXFE, UARTFIFO);
|
||||
|
||||
/* flush Tx and Rx FIFO */
|
||||
lpuart32_write(&sport->port, UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH, UARTFIFO);
|
||||
lpuart32_write(port, UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH, UARTFIFO);
|
||||
|
||||
/* explicitly clear RDRF */
|
||||
if (lpuart32_read(&sport->port, UARTSTAT) & UARTSTAT_RDRF) {
|
||||
lpuart32_read(&sport->port, UARTDATA);
|
||||
lpuart32_write(&sport->port, UARTFIFO_RXUF, UARTFIFO);
|
||||
if (lpuart32_read(port, UARTSTAT) & UARTSTAT_RDRF) {
|
||||
lpuart32_read(port, UARTDATA);
|
||||
lpuart32_write(port, UARTFIFO_RXUF, UARTFIFO);
|
||||
}
|
||||
|
||||
/* Enable Rx and Tx */
|
||||
lpuart32_write(&sport->port, UARTCTRL_RE | UARTCTRL_TE, UARTCTRL);
|
||||
uart_port_unlock_irqrestore(&sport->port, flags);
|
||||
lpuart32_write(port, UARTCTRL_RE | UARTCTRL_TE, UARTCTRL);
|
||||
uart_port_unlock_irqrestore(port, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -751,7 +748,7 @@ static inline void lpuart_transmit_buffer(struct lpuart_port *sport)
|
||||
static inline void lpuart32_transmit_buffer(struct lpuart_port *sport)
|
||||
{
|
||||
struct tty_port *tport = &sport->port.state->port;
|
||||
unsigned long txcnt;
|
||||
u32 txcnt;
|
||||
unsigned char c;
|
||||
|
||||
if (sport->port.x_char) {
|
||||
@@ -788,7 +785,7 @@ static void lpuart_start_tx(struct uart_port *port)
|
||||
{
|
||||
struct lpuart_port *sport = container_of(port,
|
||||
struct lpuart_port, port);
|
||||
unsigned char temp;
|
||||
u8 temp;
|
||||
|
||||
temp = readb(port->membase + UARTCR2);
|
||||
writeb(temp | UARTCR2_TIE, port->membase + UARTCR2);
|
||||
@@ -805,7 +802,7 @@ static void lpuart_start_tx(struct uart_port *port)
|
||||
static void lpuart32_start_tx(struct uart_port *port)
|
||||
{
|
||||
struct lpuart_port *sport = container_of(port, struct lpuart_port, port);
|
||||
unsigned long temp;
|
||||
u32 temp;
|
||||
|
||||
if (sport->lpuart_dma_tx_use) {
|
||||
if (!lpuart_stopped_or_empty(port))
|
||||
@@ -838,8 +835,8 @@ static unsigned int lpuart_tx_empty(struct uart_port *port)
|
||||
{
|
||||
struct lpuart_port *sport = container_of(port,
|
||||
struct lpuart_port, port);
|
||||
unsigned char sr1 = readb(port->membase + UARTSR1);
|
||||
unsigned char sfifo = readb(port->membase + UARTSFIFO);
|
||||
u8 sr1 = readb(port->membase + UARTSR1);
|
||||
u8 sfifo = readb(port->membase + UARTSFIFO);
|
||||
|
||||
if (sport->dma_tx_in_progress)
|
||||
return 0;
|
||||
@@ -854,9 +851,9 @@ static unsigned int lpuart32_tx_empty(struct uart_port *port)
|
||||
{
|
||||
struct lpuart_port *sport = container_of(port,
|
||||
struct lpuart_port, port);
|
||||
unsigned long stat = lpuart32_read(port, UARTSTAT);
|
||||
unsigned long sfifo = lpuart32_read(port, UARTFIFO);
|
||||
unsigned long ctrl = lpuart32_read(port, UARTCTRL);
|
||||
u32 stat = lpuart32_read(port, UARTSTAT);
|
||||
u32 sfifo = lpuart32_read(port, UARTFIFO);
|
||||
u32 ctrl = lpuart32_read(port, UARTCTRL);
|
||||
|
||||
if (sport->dma_tx_in_progress)
|
||||
return 0;
|
||||
@@ -883,7 +880,7 @@ static void lpuart_rxint(struct lpuart_port *sport)
|
||||
{
|
||||
unsigned int flg, ignored = 0, overrun = 0;
|
||||
struct tty_port *port = &sport->port.state->port;
|
||||
unsigned char rx, sr;
|
||||
u8 rx, sr;
|
||||
|
||||
uart_port_lock(&sport->port);
|
||||
|
||||
@@ -960,7 +957,7 @@ static void lpuart32_rxint(struct lpuart_port *sport)
|
||||
{
|
||||
unsigned int flg, ignored = 0;
|
||||
struct tty_port *port = &sport->port.state->port;
|
||||
unsigned long rx, sr;
|
||||
u32 rx, sr;
|
||||
bool is_break;
|
||||
|
||||
uart_port_lock(&sport->port);
|
||||
@@ -1038,7 +1035,7 @@ out:
|
||||
static irqreturn_t lpuart_int(int irq, void *dev_id)
|
||||
{
|
||||
struct lpuart_port *sport = dev_id;
|
||||
unsigned char sts;
|
||||
u8 sts;
|
||||
|
||||
sts = readb(sport->port.membase + UARTSR1);
|
||||
|
||||
@@ -1112,7 +1109,7 @@ static void lpuart_copy_rx_to_tty(struct lpuart_port *sport)
|
||||
int count, copied;
|
||||
|
||||
if (lpuart_is_32(sport)) {
|
||||
unsigned long sr = lpuart32_read(&sport->port, UARTSTAT);
|
||||
u32 sr = lpuart32_read(&sport->port, UARTSTAT);
|
||||
|
||||
if (sr & (UARTSTAT_PE | UARTSTAT_FE)) {
|
||||
/* Clear the error flags */
|
||||
@@ -1124,10 +1121,10 @@ static void lpuart_copy_rx_to_tty(struct lpuart_port *sport)
|
||||
sport->port.icount.frame++;
|
||||
}
|
||||
} else {
|
||||
unsigned char sr = readb(sport->port.membase + UARTSR1);
|
||||
u8 sr = readb(sport->port.membase + UARTSR1);
|
||||
|
||||
if (sr & (UARTSR1_PE | UARTSR1_FE)) {
|
||||
unsigned char cr2;
|
||||
u8 cr2;
|
||||
|
||||
/* Disable receiver during this operation... */
|
||||
cr2 = readb(sport->port.membase + UARTCR2);
|
||||
@@ -1278,7 +1275,7 @@ static void lpuart32_dma_idleint(struct lpuart_port *sport)
|
||||
static irqreturn_t lpuart32_int(int irq, void *dev_id)
|
||||
{
|
||||
struct lpuart_port *sport = dev_id;
|
||||
unsigned long sts, rxcount;
|
||||
u32 sts, rxcount;
|
||||
|
||||
sts = lpuart32_read(&sport->port, UARTSTAT);
|
||||
rxcount = lpuart32_read(&sport->port, UARTWATER);
|
||||
@@ -1410,12 +1407,12 @@ static inline int lpuart_start_rx_dma(struct lpuart_port *sport)
|
||||
dma_async_issue_pending(chan);
|
||||
|
||||
if (lpuart_is_32(sport)) {
|
||||
unsigned long temp = lpuart32_read(&sport->port, UARTBAUD);
|
||||
u32 temp = lpuart32_read(&sport->port, UARTBAUD);
|
||||
|
||||
lpuart32_write(&sport->port, temp | UARTBAUD_RDMAE, UARTBAUD);
|
||||
|
||||
if (sport->dma_idle_int) {
|
||||
unsigned long ctrl = lpuart32_read(&sport->port, UARTCTRL);
|
||||
u32 ctrl = lpuart32_read(&sport->port, UARTCTRL);
|
||||
|
||||
lpuart32_write(&sport->port, ctrl | UARTCTRL_ILIE, UARTCTRL);
|
||||
}
|
||||
@@ -1448,12 +1445,9 @@ static void lpuart_dma_rx_free(struct uart_port *port)
|
||||
static int lpuart_config_rs485(struct uart_port *port, struct ktermios *termios,
|
||||
struct serial_rs485 *rs485)
|
||||
{
|
||||
struct lpuart_port *sport = container_of(port,
|
||||
struct lpuart_port, port);
|
||||
|
||||
u8 modem = readb(sport->port.membase + UARTMODEM) &
|
||||
u8 modem = readb(port->membase + UARTMODEM) &
|
||||
~(UARTMODEM_TXRTSPOL | UARTMODEM_TXRTSE);
|
||||
writeb(modem, sport->port.membase + UARTMODEM);
|
||||
writeb(modem, port->membase + UARTMODEM);
|
||||
|
||||
if (rs485->flags & SER_RS485_ENABLED) {
|
||||
/* Enable auto RS-485 RTS mode */
|
||||
@@ -1471,32 +1465,29 @@ static int lpuart_config_rs485(struct uart_port *port, struct ktermios *termios,
|
||||
modem &= ~UARTMODEM_TXRTSPOL;
|
||||
}
|
||||
|
||||
writeb(modem, sport->port.membase + UARTMODEM);
|
||||
writeb(modem, port->membase + UARTMODEM);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lpuart32_config_rs485(struct uart_port *port, struct ktermios *termios,
|
||||
struct serial_rs485 *rs485)
|
||||
{
|
||||
struct lpuart_port *sport = container_of(port,
|
||||
struct lpuart_port, port);
|
||||
|
||||
unsigned long modem = lpuart32_read(&sport->port, UARTMODIR)
|
||||
u32 modem = lpuart32_read(port, UARTMODIR)
|
||||
& ~(UARTMODIR_TXRTSPOL | UARTMODIR_TXRTSE);
|
||||
u32 ctrl;
|
||||
|
||||
/* TXRTSE and TXRTSPOL only can be changed when transmitter is disabled. */
|
||||
ctrl = lpuart32_read(&sport->port, UARTCTRL);
|
||||
ctrl = lpuart32_read(port, UARTCTRL);
|
||||
if (ctrl & UARTCTRL_TE) {
|
||||
/* wait for the transmit engine to complete */
|
||||
lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC);
|
||||
lpuart32_write(&sport->port, ctrl & ~UARTCTRL_TE, UARTCTRL);
|
||||
lpuart32_wait_bit_set(port, UARTSTAT, UARTSTAT_TC);
|
||||
lpuart32_write(port, ctrl & ~UARTCTRL_TE, UARTCTRL);
|
||||
|
||||
while (lpuart32_read(&sport->port, UARTCTRL) & UARTCTRL_TE)
|
||||
while (lpuart32_read(port, UARTCTRL) & UARTCTRL_TE)
|
||||
cpu_relax();
|
||||
}
|
||||
|
||||
lpuart32_write(&sport->port, modem, UARTMODIR);
|
||||
lpuart32_write(port, modem, UARTMODIR);
|
||||
|
||||
if (rs485->flags & SER_RS485_ENABLED) {
|
||||
/* Enable auto RS-485 RTS mode */
|
||||
@@ -1514,10 +1505,10 @@ static int lpuart32_config_rs485(struct uart_port *port, struct ktermios *termio
|
||||
modem &= ~UARTMODIR_TXRTSPOL;
|
||||
}
|
||||
|
||||
lpuart32_write(&sport->port, modem, UARTMODIR);
|
||||
lpuart32_write(port, modem, UARTMODIR);
|
||||
|
||||
if (ctrl & UARTCTRL_TE)
|
||||
lpuart32_write(&sport->port, ctrl, UARTCTRL);
|
||||
lpuart32_write(port, ctrl, UARTCTRL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -1576,7 +1567,7 @@ static void lpuart32_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
||||
|
||||
static void lpuart_break_ctl(struct uart_port *port, int break_state)
|
||||
{
|
||||
unsigned char temp;
|
||||
u8 temp;
|
||||
|
||||
temp = readb(port->membase + UARTCR2) & ~UARTCR2_SBK;
|
||||
|
||||
@@ -1588,7 +1579,7 @@ static void lpuart_break_ctl(struct uart_port *port, int break_state)
|
||||
|
||||
static void lpuart32_break_ctl(struct uart_port *port, int break_state)
|
||||
{
|
||||
unsigned long temp;
|
||||
u32 temp;
|
||||
|
||||
temp = lpuart32_read(port, UARTCTRL);
|
||||
|
||||
@@ -1622,8 +1613,7 @@ static void lpuart32_break_ctl(struct uart_port *port, int break_state)
|
||||
|
||||
static void lpuart_setup_watermark(struct lpuart_port *sport)
|
||||
{
|
||||
unsigned char val, cr2;
|
||||
unsigned char cr2_saved;
|
||||
u8 val, cr2, cr2_saved;
|
||||
|
||||
cr2 = readb(sport->port.membase + UARTCR2);
|
||||
cr2_saved = cr2;
|
||||
@@ -1656,7 +1646,7 @@ static void lpuart_setup_watermark(struct lpuart_port *sport)
|
||||
|
||||
static void lpuart_setup_watermark_enable(struct lpuart_port *sport)
|
||||
{
|
||||
unsigned char cr2;
|
||||
u8 cr2;
|
||||
|
||||
lpuart_setup_watermark(sport);
|
||||
|
||||
@@ -1667,8 +1657,7 @@ static void lpuart_setup_watermark_enable(struct lpuart_port *sport)
|
||||
|
||||
static void lpuart32_setup_watermark(struct lpuart_port *sport)
|
||||
{
|
||||
unsigned long val, ctrl;
|
||||
unsigned long ctrl_saved;
|
||||
u32 val, ctrl, ctrl_saved;
|
||||
|
||||
ctrl = lpuart32_read(&sport->port, UARTCTRL);
|
||||
ctrl_saved = ctrl;
|
||||
@@ -1777,7 +1766,7 @@ err:
|
||||
static void lpuart_rx_dma_startup(struct lpuart_port *sport)
|
||||
{
|
||||
int ret;
|
||||
unsigned char cr3;
|
||||
u8 cr3;
|
||||
|
||||
if (uart_console(&sport->port))
|
||||
goto err;
|
||||
@@ -1827,14 +1816,14 @@ static void lpuart_hw_setup(struct lpuart_port *sport)
|
||||
static int lpuart_startup(struct uart_port *port)
|
||||
{
|
||||
struct lpuart_port *sport = container_of(port, struct lpuart_port, port);
|
||||
unsigned char temp;
|
||||
u8 temp;
|
||||
|
||||
/* determine FIFO size and enable FIFO mode */
|
||||
temp = readb(sport->port.membase + UARTPFIFO);
|
||||
temp = readb(port->membase + UARTPFIFO);
|
||||
|
||||
sport->txfifo_size = UARTFIFO_DEPTH((temp >> UARTPFIFO_TXSIZE_OFF) &
|
||||
UARTPFIFO_FIFOSIZE_MASK);
|
||||
sport->port.fifosize = sport->txfifo_size;
|
||||
port->fifosize = sport->txfifo_size;
|
||||
|
||||
sport->rxfifo_size = UARTFIFO_DEPTH((temp >> UARTPFIFO_RXSIZE_OFF) &
|
||||
UARTPFIFO_FIFOSIZE_MASK);
|
||||
@@ -1847,7 +1836,7 @@ static int lpuart_startup(struct uart_port *port)
|
||||
|
||||
static void lpuart32_hw_disable(struct lpuart_port *sport)
|
||||
{
|
||||
unsigned long temp;
|
||||
u32 temp;
|
||||
|
||||
temp = lpuart32_read(&sport->port, UARTCTRL);
|
||||
temp &= ~(UARTCTRL_RIE | UARTCTRL_ILIE | UARTCTRL_RE |
|
||||
@@ -1857,7 +1846,7 @@ static void lpuart32_hw_disable(struct lpuart_port *sport)
|
||||
|
||||
static void lpuart32_configure(struct lpuart_port *sport)
|
||||
{
|
||||
unsigned long temp;
|
||||
u32 temp;
|
||||
|
||||
temp = lpuart32_read(&sport->port, UARTCTRL);
|
||||
if (!sport->lpuart_dma_rx_use)
|
||||
@@ -1887,14 +1876,14 @@ static void lpuart32_hw_setup(struct lpuart_port *sport)
|
||||
static int lpuart32_startup(struct uart_port *port)
|
||||
{
|
||||
struct lpuart_port *sport = container_of(port, struct lpuart_port, port);
|
||||
unsigned long temp;
|
||||
u32 temp;
|
||||
|
||||
/* determine FIFO size */
|
||||
temp = lpuart32_read(&sport->port, UARTFIFO);
|
||||
temp = lpuart32_read(port, UARTFIFO);
|
||||
|
||||
sport->txfifo_size = UARTFIFO_DEPTH((temp >> UARTFIFO_TXSIZE_OFF) &
|
||||
UARTFIFO_FIFOSIZE_MASK);
|
||||
sport->port.fifosize = sport->txfifo_size;
|
||||
port->fifosize = sport->txfifo_size;
|
||||
|
||||
sport->rxfifo_size = UARTFIFO_DEPTH((temp >> UARTFIFO_RXSIZE_OFF) &
|
||||
UARTFIFO_FIFOSIZE_MASK);
|
||||
@@ -1907,7 +1896,7 @@ static int lpuart32_startup(struct uart_port *port)
|
||||
if (is_layerscape_lpuart(sport)) {
|
||||
sport->rxfifo_size = 16;
|
||||
sport->txfifo_size = 16;
|
||||
sport->port.fifosize = sport->txfifo_size;
|
||||
port->fifosize = sport->txfifo_size;
|
||||
}
|
||||
|
||||
lpuart_request_dma(sport);
|
||||
@@ -1941,7 +1930,7 @@ static void lpuart_dma_shutdown(struct lpuart_port *sport)
|
||||
static void lpuart_shutdown(struct uart_port *port)
|
||||
{
|
||||
struct lpuart_port *sport = container_of(port, struct lpuart_port, port);
|
||||
unsigned char temp;
|
||||
u8 temp;
|
||||
unsigned long flags;
|
||||
|
||||
uart_port_lock_irqsave(port, &flags);
|
||||
@@ -1961,14 +1950,14 @@ static void lpuart32_shutdown(struct uart_port *port)
|
||||
{
|
||||
struct lpuart_port *sport =
|
||||
container_of(port, struct lpuart_port, port);
|
||||
unsigned long temp;
|
||||
u32 temp;
|
||||
unsigned long flags;
|
||||
|
||||
uart_port_lock_irqsave(port, &flags);
|
||||
|
||||
/* clear status */
|
||||
temp = lpuart32_read(&sport->port, UARTSTAT);
|
||||
lpuart32_write(&sport->port, temp, UARTSTAT);
|
||||
temp = lpuart32_read(port, UARTSTAT);
|
||||
lpuart32_write(port, temp, UARTSTAT);
|
||||
|
||||
/* disable Rx/Tx DMA */
|
||||
temp = lpuart32_read(port, UARTBAUD);
|
||||
@@ -1992,17 +1981,17 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
{
|
||||
struct lpuart_port *sport = container_of(port, struct lpuart_port, port);
|
||||
unsigned long flags;
|
||||
unsigned char cr1, old_cr1, old_cr2, cr3, cr4, bdh, modem;
|
||||
u8 cr1, old_cr1, old_cr2, cr3, cr4, bdh, modem;
|
||||
unsigned int baud;
|
||||
unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
|
||||
unsigned int sbr, brfa;
|
||||
|
||||
cr1 = old_cr1 = readb(sport->port.membase + UARTCR1);
|
||||
old_cr2 = readb(sport->port.membase + UARTCR2);
|
||||
cr3 = readb(sport->port.membase + UARTCR3);
|
||||
cr4 = readb(sport->port.membase + UARTCR4);
|
||||
bdh = readb(sport->port.membase + UARTBDH);
|
||||
modem = readb(sport->port.membase + UARTMODEM);
|
||||
cr1 = old_cr1 = readb(port->membase + UARTCR1);
|
||||
old_cr2 = readb(port->membase + UARTCR2);
|
||||
cr3 = readb(port->membase + UARTCR3);
|
||||
cr4 = readb(port->membase + UARTCR4);
|
||||
bdh = readb(port->membase + UARTBDH);
|
||||
modem = readb(port->membase + UARTMODEM);
|
||||
/*
|
||||
* only support CS8 and CS7, and for CS7 must enable PE.
|
||||
* supported mode:
|
||||
@@ -2034,7 +2023,7 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
* When auto RS-485 RTS mode is enabled,
|
||||
* hardware flow control need to be disabled.
|
||||
*/
|
||||
if (sport->port.rs485.flags & SER_RS485_ENABLED)
|
||||
if (port->rs485.flags & SER_RS485_ENABLED)
|
||||
termios->c_cflag &= ~CRTSCTS;
|
||||
|
||||
if (termios->c_cflag & CRTSCTS)
|
||||
@@ -2075,59 +2064,59 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
* Need to update the Ring buffer length according to the selected
|
||||
* baud rate and restart Rx DMA path.
|
||||
*
|
||||
* Since timer function acqures sport->port.lock, need to stop before
|
||||
* Since timer function acqures port->lock, need to stop before
|
||||
* acquring same lock because otherwise del_timer_sync() can deadlock.
|
||||
*/
|
||||
if (old && sport->lpuart_dma_rx_use)
|
||||
lpuart_dma_rx_free(&sport->port);
|
||||
lpuart_dma_rx_free(port);
|
||||
|
||||
uart_port_lock_irqsave(&sport->port, &flags);
|
||||
uart_port_lock_irqsave(port, &flags);
|
||||
|
||||
sport->port.read_status_mask = 0;
|
||||
port->read_status_mask = 0;
|
||||
if (termios->c_iflag & INPCK)
|
||||
sport->port.read_status_mask |= UARTSR1_FE | UARTSR1_PE;
|
||||
port->read_status_mask |= UARTSR1_FE | UARTSR1_PE;
|
||||
if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
|
||||
sport->port.read_status_mask |= UARTSR1_FE;
|
||||
port->read_status_mask |= UARTSR1_FE;
|
||||
|
||||
/* characters to ignore */
|
||||
sport->port.ignore_status_mask = 0;
|
||||
port->ignore_status_mask = 0;
|
||||
if (termios->c_iflag & IGNPAR)
|
||||
sport->port.ignore_status_mask |= UARTSR1_PE;
|
||||
port->ignore_status_mask |= UARTSR1_PE;
|
||||
if (termios->c_iflag & IGNBRK) {
|
||||
sport->port.ignore_status_mask |= UARTSR1_FE;
|
||||
port->ignore_status_mask |= UARTSR1_FE;
|
||||
/*
|
||||
* if we're ignoring parity and break indicators,
|
||||
* ignore overruns too (for real raw support).
|
||||
*/
|
||||
if (termios->c_iflag & IGNPAR)
|
||||
sport->port.ignore_status_mask |= UARTSR1_OR;
|
||||
port->ignore_status_mask |= UARTSR1_OR;
|
||||
}
|
||||
|
||||
/* update the per-port timeout */
|
||||
uart_update_timeout(port, termios->c_cflag, baud);
|
||||
|
||||
/* wait transmit engin complete */
|
||||
lpuart_wait_bit_set(&sport->port, UARTSR1, UARTSR1_TC);
|
||||
lpuart_wait_bit_set(port, UARTSR1, UARTSR1_TC);
|
||||
|
||||
/* disable transmit and receive */
|
||||
writeb(old_cr2 & ~(UARTCR2_TE | UARTCR2_RE),
|
||||
sport->port.membase + UARTCR2);
|
||||
port->membase + UARTCR2);
|
||||
|
||||
sbr = sport->port.uartclk / (16 * baud);
|
||||
brfa = ((sport->port.uartclk - (16 * sbr * baud)) * 2) / baud;
|
||||
sbr = port->uartclk / (16 * baud);
|
||||
brfa = ((port->uartclk - (16 * sbr * baud)) * 2) / baud;
|
||||
bdh &= ~UARTBDH_SBR_MASK;
|
||||
bdh |= (sbr >> 8) & 0x1F;
|
||||
cr4 &= ~UARTCR4_BRFA_MASK;
|
||||
brfa &= UARTCR4_BRFA_MASK;
|
||||
writeb(cr4 | brfa, sport->port.membase + UARTCR4);
|
||||
writeb(bdh, sport->port.membase + UARTBDH);
|
||||
writeb(sbr & 0xFF, sport->port.membase + UARTBDL);
|
||||
writeb(cr3, sport->port.membase + UARTCR3);
|
||||
writeb(cr1, sport->port.membase + UARTCR1);
|
||||
writeb(modem, sport->port.membase + UARTMODEM);
|
||||
writeb(cr4 | brfa, port->membase + UARTCR4);
|
||||
writeb(bdh, port->membase + UARTBDH);
|
||||
writeb(sbr & 0xFF, port->membase + UARTBDL);
|
||||
writeb(cr3, port->membase + UARTCR3);
|
||||
writeb(cr1, port->membase + UARTCR1);
|
||||
writeb(modem, port->membase + UARTMODEM);
|
||||
|
||||
/* restore control register */
|
||||
writeb(old_cr2, sport->port.membase + UARTCR2);
|
||||
writeb(old_cr2, port->membase + UARTCR2);
|
||||
|
||||
if (old && sport->lpuart_dma_rx_use) {
|
||||
if (!lpuart_start_rx_dma(sport))
|
||||
@@ -2136,7 +2125,7 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
sport->lpuart_dma_rx_use = false;
|
||||
}
|
||||
|
||||
uart_port_unlock_irqrestore(&sport->port, flags);
|
||||
uart_port_unlock_irqrestore(port, flags);
|
||||
}
|
||||
|
||||
static void __lpuart32_serial_setbrg(struct uart_port *port,
|
||||
@@ -2230,13 +2219,13 @@ lpuart32_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
{
|
||||
struct lpuart_port *sport = container_of(port, struct lpuart_port, port);
|
||||
unsigned long flags;
|
||||
unsigned long ctrl, old_ctrl, bd, modem;
|
||||
u32 ctrl, old_ctrl, bd, modem;
|
||||
unsigned int baud;
|
||||
unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
|
||||
|
||||
ctrl = old_ctrl = lpuart32_read(&sport->port, UARTCTRL);
|
||||
bd = lpuart32_read(&sport->port, UARTBAUD);
|
||||
modem = lpuart32_read(&sport->port, UARTMODIR);
|
||||
ctrl = old_ctrl = lpuart32_read(port, UARTCTRL);
|
||||
bd = lpuart32_read(port, UARTBAUD);
|
||||
modem = lpuart32_read(port, UARTMODIR);
|
||||
sport->is_cs7 = false;
|
||||
/*
|
||||
* only support CS8 and CS7, and for CS7 must enable PE.
|
||||
@@ -2269,7 +2258,7 @@ lpuart32_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
* When auto RS-485 RTS mode is enabled,
|
||||
* hardware flow control need to be disabled.
|
||||
*/
|
||||
if (sport->port.rs485.flags & SER_RS485_ENABLED)
|
||||
if (port->rs485.flags & SER_RS485_ENABLED)
|
||||
termios->c_cflag &= ~CRTSCTS;
|
||||
|
||||
if (termios->c_cflag & CRTSCTS)
|
||||
@@ -2310,59 +2299,61 @@ lpuart32_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
* Need to update the Ring buffer length according to the selected
|
||||
* baud rate and restart Rx DMA path.
|
||||
*
|
||||
* Since timer function acqures sport->port.lock, need to stop before
|
||||
* Since timer function acqures port->lock, need to stop before
|
||||
* acquring same lock because otherwise del_timer_sync() can deadlock.
|
||||
*/
|
||||
if (old && sport->lpuart_dma_rx_use)
|
||||
lpuart_dma_rx_free(&sport->port);
|
||||
lpuart_dma_rx_free(port);
|
||||
|
||||
uart_port_lock_irqsave(&sport->port, &flags);
|
||||
uart_port_lock_irqsave(port, &flags);
|
||||
|
||||
sport->port.read_status_mask = 0;
|
||||
port->read_status_mask = 0;
|
||||
if (termios->c_iflag & INPCK)
|
||||
sport->port.read_status_mask |= UARTSTAT_FE | UARTSTAT_PE;
|
||||
port->read_status_mask |= UARTSTAT_FE | UARTSTAT_PE;
|
||||
if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
|
||||
sport->port.read_status_mask |= UARTSTAT_FE;
|
||||
port->read_status_mask |= UARTSTAT_FE;
|
||||
|
||||
/* characters to ignore */
|
||||
sport->port.ignore_status_mask = 0;
|
||||
port->ignore_status_mask = 0;
|
||||
if (termios->c_iflag & IGNPAR)
|
||||
sport->port.ignore_status_mask |= UARTSTAT_PE;
|
||||
port->ignore_status_mask |= UARTSTAT_PE;
|
||||
if (termios->c_iflag & IGNBRK) {
|
||||
sport->port.ignore_status_mask |= UARTSTAT_FE;
|
||||
port->ignore_status_mask |= UARTSTAT_FE;
|
||||
/*
|
||||
* if we're ignoring parity and break indicators,
|
||||
* ignore overruns too (for real raw support).
|
||||
*/
|
||||
if (termios->c_iflag & IGNPAR)
|
||||
sport->port.ignore_status_mask |= UARTSTAT_OR;
|
||||
port->ignore_status_mask |= UARTSTAT_OR;
|
||||
}
|
||||
|
||||
/* update the per-port timeout */
|
||||
uart_update_timeout(port, termios->c_cflag, baud);
|
||||
|
||||
/*
|
||||
* disable CTS to ensure the transmit engine is not blocked by the flow
|
||||
* control when there is dirty data in TX FIFO
|
||||
*/
|
||||
lpuart32_write(port, modem & ~UARTMODIR_TXCTSE, UARTMODIR);
|
||||
|
||||
/*
|
||||
* LPUART Transmission Complete Flag may never be set while queuing a break
|
||||
* character, so skip waiting for transmission complete when UARTCTRL_SBK is
|
||||
* asserted.
|
||||
*/
|
||||
if (!(old_ctrl & UARTCTRL_SBK)) {
|
||||
lpuart32_write(&sport->port, 0, UARTMODIR);
|
||||
lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC);
|
||||
}
|
||||
if (!(old_ctrl & UARTCTRL_SBK))
|
||||
lpuart32_wait_bit_set(port, UARTSTAT, UARTSTAT_TC);
|
||||
|
||||
/* disable transmit and receive */
|
||||
lpuart32_write(&sport->port, old_ctrl & ~(UARTCTRL_TE | UARTCTRL_RE),
|
||||
lpuart32_write(port, old_ctrl & ~(UARTCTRL_TE | UARTCTRL_RE),
|
||||
UARTCTRL);
|
||||
|
||||
lpuart32_write(&sport->port, bd, UARTBAUD);
|
||||
lpuart32_write(port, bd, UARTBAUD);
|
||||
lpuart32_serial_setbrg(sport, baud);
|
||||
/* disable CTS before enabling UARTCTRL_TE to avoid pending idle preamble */
|
||||
lpuart32_write(&sport->port, modem & ~UARTMODIR_TXCTSE, UARTMODIR);
|
||||
/* restore control register */
|
||||
lpuart32_write(&sport->port, ctrl, UARTCTRL);
|
||||
lpuart32_write(port, ctrl, UARTCTRL);
|
||||
/* re-enable the CTS if needed */
|
||||
lpuart32_write(&sport->port, modem, UARTMODIR);
|
||||
lpuart32_write(port, modem, UARTMODIR);
|
||||
|
||||
if ((ctrl & (UARTCTRL_PE | UARTCTRL_M)) == UARTCTRL_PE)
|
||||
sport->is_cs7 = true;
|
||||
@@ -2374,7 +2365,7 @@ lpuart32_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
sport->lpuart_dma_rx_use = false;
|
||||
}
|
||||
|
||||
uart_port_unlock_irqrestore(&sport->port, flags);
|
||||
uart_port_unlock_irqrestore(port, flags);
|
||||
}
|
||||
|
||||
static const char *lpuart_type(struct uart_port *port)
|
||||
@@ -2487,7 +2478,7 @@ static void
|
||||
lpuart_console_write(struct console *co, const char *s, unsigned int count)
|
||||
{
|
||||
struct lpuart_port *sport = lpuart_ports[co->index];
|
||||
unsigned char old_cr2, cr2;
|
||||
u8 old_cr2, cr2;
|
||||
unsigned long flags;
|
||||
int locked = 1;
|
||||
|
||||
@@ -2517,7 +2508,7 @@ static void
|
||||
lpuart32_console_write(struct console *co, const char *s, unsigned int count)
|
||||
{
|
||||
struct lpuart_port *sport = lpuart_ports[co->index];
|
||||
unsigned long old_cr, cr;
|
||||
u32 old_cr, cr;
|
||||
unsigned long flags;
|
||||
int locked = 1;
|
||||
|
||||
@@ -2551,7 +2542,7 @@ static void __init
|
||||
lpuart_console_get_options(struct lpuart_port *sport, int *baud,
|
||||
int *parity, int *bits)
|
||||
{
|
||||
unsigned char cr, bdh, bdl, brfa;
|
||||
u8 cr, bdh, bdl, brfa;
|
||||
unsigned int sbr, uartclk, baud_raw;
|
||||
|
||||
cr = readb(sport->port.membase + UARTCR2);
|
||||
@@ -2600,7 +2591,7 @@ static void __init
|
||||
lpuart32_console_get_options(struct lpuart_port *sport, int *baud,
|
||||
int *parity, int *bits)
|
||||
{
|
||||
unsigned long cr, bd;
|
||||
u32 cr, bd;
|
||||
unsigned int sbr, uartclk, baud_raw;
|
||||
|
||||
cr = lpuart32_read(&sport->port, UARTCTRL);
|
||||
@@ -2806,13 +2797,13 @@ static int lpuart_global_reset(struct lpuart_port *sport)
|
||||
{
|
||||
struct uart_port *port = &sport->port;
|
||||
void __iomem *global_addr;
|
||||
unsigned long ctrl, bd;
|
||||
u32 ctrl, bd;
|
||||
unsigned int val = 0;
|
||||
int ret;
|
||||
|
||||
ret = clk_prepare_enable(sport->ipg_clk);
|
||||
if (ret) {
|
||||
dev_err(sport->port.dev, "failed to enable uart ipg clk: %d\n", ret);
|
||||
dev_err(port->dev, "failed to enable uart ipg clk: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -2823,10 +2814,10 @@ static int lpuart_global_reset(struct lpuart_port *sport)
|
||||
*/
|
||||
ctrl = lpuart32_read(port, UARTCTRL);
|
||||
if (ctrl & UARTCTRL_TE) {
|
||||
bd = lpuart32_read(&sport->port, UARTBAUD);
|
||||
bd = lpuart32_read(port, UARTBAUD);
|
||||
if (read_poll_timeout(lpuart32_tx_empty, val, val, 1, 100000, false,
|
||||
port)) {
|
||||
dev_warn(sport->port.dev,
|
||||
dev_warn(port->dev,
|
||||
"timeout waiting for transmit engine to complete\n");
|
||||
clk_disable_unprepare(sport->ipg_clk);
|
||||
return 0;
|
||||
@@ -3012,7 +3003,7 @@ static int lpuart_runtime_resume(struct device *dev)
|
||||
|
||||
static void serial_lpuart_enable_wakeup(struct lpuart_port *sport, bool on)
|
||||
{
|
||||
unsigned int val, baud;
|
||||
u32 val, baud;
|
||||
|
||||
if (lpuart_is_32(sport)) {
|
||||
val = lpuart32_read(&sport->port, UARTCTRL);
|
||||
@@ -3077,7 +3068,7 @@ static int lpuart_suspend_noirq(struct device *dev)
|
||||
static int lpuart_resume_noirq(struct device *dev)
|
||||
{
|
||||
struct lpuart_port *sport = dev_get_drvdata(dev);
|
||||
unsigned int val;
|
||||
u32 val;
|
||||
|
||||
pinctrl_pm_select_default_state(dev);
|
||||
|
||||
@@ -3097,7 +3088,8 @@ static int lpuart_resume_noirq(struct device *dev)
|
||||
static int lpuart_suspend(struct device *dev)
|
||||
{
|
||||
struct lpuart_port *sport = dev_get_drvdata(dev);
|
||||
unsigned long temp, flags;
|
||||
u32 temp;
|
||||
unsigned long flags;
|
||||
|
||||
uart_suspend_port(&lpuart_reg, &sport->port);
|
||||
|
||||
@@ -3177,7 +3169,7 @@ static void lpuart_console_fixup(struct lpuart_port *sport)
|
||||
* in VLLS mode, or restore console setting here.
|
||||
*/
|
||||
if (is_imx7ulp_lpuart(sport) && lpuart_uport_is_active(sport) &&
|
||||
console_suspend_enabled && uart_console(&sport->port)) {
|
||||
console_suspend_enabled && uart_console(uport)) {
|
||||
|
||||
mutex_lock(&port->mutex);
|
||||
memset(&termios, 0, sizeof(struct ktermios));
|
||||
|
||||
@@ -1016,9 +1016,9 @@ static int ksmbd_get_encryption_key(struct ksmbd_work *work, __u64 ses_id,
|
||||
|
||||
ses_enc_key = enc ? sess->smb3encryptionkey :
|
||||
sess->smb3decryptionkey;
|
||||
if (enc)
|
||||
ksmbd_user_session_get(sess);
|
||||
memcpy(key, ses_enc_key, SMB3_ENC_DEC_KEY_SIZE);
|
||||
if (!enc)
|
||||
ksmbd_user_session_put(sess);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -27,6 +27,7 @@ enum {
|
||||
KSMBD_SESS_EXITING,
|
||||
KSMBD_SESS_NEED_RECONNECT,
|
||||
KSMBD_SESS_NEED_NEGOTIATE,
|
||||
KSMBD_SESS_NEED_SETUP,
|
||||
KSMBD_SESS_RELEASING
|
||||
};
|
||||
|
||||
@@ -187,6 +188,11 @@ static inline bool ksmbd_conn_need_negotiate(struct ksmbd_conn *conn)
|
||||
return READ_ONCE(conn->status) == KSMBD_SESS_NEED_NEGOTIATE;
|
||||
}
|
||||
|
||||
static inline bool ksmbd_conn_need_setup(struct ksmbd_conn *conn)
|
||||
{
|
||||
return READ_ONCE(conn->status) == KSMBD_SESS_NEED_SETUP;
|
||||
}
|
||||
|
||||
static inline bool ksmbd_conn_need_reconnect(struct ksmbd_conn *conn)
|
||||
{
|
||||
return READ_ONCE(conn->status) == KSMBD_SESS_NEED_RECONNECT;
|
||||
@@ -217,6 +223,11 @@ static inline void ksmbd_conn_set_need_negotiate(struct ksmbd_conn *conn)
|
||||
WRITE_ONCE(conn->status, KSMBD_SESS_NEED_NEGOTIATE);
|
||||
}
|
||||
|
||||
static inline void ksmbd_conn_set_need_setup(struct ksmbd_conn *conn)
|
||||
{
|
||||
WRITE_ONCE(conn->status, KSMBD_SESS_NEED_SETUP);
|
||||
}
|
||||
|
||||
static inline void ksmbd_conn_set_need_reconnect(struct ksmbd_conn *conn)
|
||||
{
|
||||
WRITE_ONCE(conn->status, KSMBD_SESS_NEED_RECONNECT);
|
||||
|
||||
@@ -181,7 +181,7 @@ static void ksmbd_expire_session(struct ksmbd_conn *conn)
|
||||
down_write(&sessions_table_lock);
|
||||
down_write(&conn->session_lock);
|
||||
xa_for_each(&conn->sessions, id, sess) {
|
||||
if (atomic_read(&sess->refcnt) == 0 &&
|
||||
if (atomic_read(&sess->refcnt) <= 1 &&
|
||||
(sess->state != SMB2_SESSION_VALID ||
|
||||
time_after(jiffies,
|
||||
sess->last_active + SMB2_SESSION_TIMEOUT))) {
|
||||
@@ -230,7 +230,11 @@ void ksmbd_sessions_deregister(struct ksmbd_conn *conn)
|
||||
if (!ksmbd_chann_del(conn, sess) &&
|
||||
xa_empty(&sess->ksmbd_chann_list)) {
|
||||
hash_del(&sess->hlist);
|
||||
ksmbd_session_destroy(sess);
|
||||
down_write(&conn->session_lock);
|
||||
xa_erase(&conn->sessions, sess->id);
|
||||
up_write(&conn->session_lock);
|
||||
if (atomic_dec_and_test(&sess->refcnt))
|
||||
ksmbd_session_destroy(sess);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -249,7 +253,8 @@ void ksmbd_sessions_deregister(struct ksmbd_conn *conn)
|
||||
if (xa_empty(&sess->ksmbd_chann_list)) {
|
||||
xa_erase(&conn->sessions, sess->id);
|
||||
hash_del(&sess->hlist);
|
||||
ksmbd_session_destroy(sess);
|
||||
if (atomic_dec_and_test(&sess->refcnt))
|
||||
ksmbd_session_destroy(sess);
|
||||
}
|
||||
}
|
||||
up_write(&conn->session_lock);
|
||||
@@ -325,8 +330,8 @@ void ksmbd_user_session_put(struct ksmbd_session *sess)
|
||||
|
||||
if (atomic_read(&sess->refcnt) <= 0)
|
||||
WARN_ON(1);
|
||||
else
|
||||
atomic_dec(&sess->refcnt);
|
||||
else if (atomic_dec_and_test(&sess->refcnt))
|
||||
ksmbd_session_destroy(sess);
|
||||
}
|
||||
|
||||
struct preauth_session *ksmbd_preauth_session_alloc(struct ksmbd_conn *conn,
|
||||
@@ -369,13 +374,13 @@ void destroy_previous_session(struct ksmbd_conn *conn,
|
||||
ksmbd_all_conn_set_status(id, KSMBD_SESS_NEED_RECONNECT);
|
||||
err = ksmbd_conn_wait_idle_sess_id(conn, id);
|
||||
if (err) {
|
||||
ksmbd_all_conn_set_status(id, KSMBD_SESS_NEED_NEGOTIATE);
|
||||
ksmbd_all_conn_set_status(id, KSMBD_SESS_NEED_SETUP);
|
||||
goto out;
|
||||
}
|
||||
|
||||
ksmbd_destroy_file_table(&prev_sess->file_table);
|
||||
prev_sess->state = SMB2_SESSION_EXPIRED;
|
||||
ksmbd_all_conn_set_status(id, KSMBD_SESS_NEED_NEGOTIATE);
|
||||
ksmbd_all_conn_set_status(id, KSMBD_SESS_NEED_SETUP);
|
||||
ksmbd_launch_ksmbd_durable_scavenger();
|
||||
out:
|
||||
up_write(&conn->session_lock);
|
||||
@@ -433,7 +438,7 @@ static struct ksmbd_session *__session_create(int protocol)
|
||||
xa_init(&sess->rpc_handle_list);
|
||||
sess->sequence_number = 1;
|
||||
rwlock_init(&sess->tree_conns_lock);
|
||||
atomic_set(&sess->refcnt, 1);
|
||||
atomic_set(&sess->refcnt, 2);
|
||||
|
||||
ret = __init_smb2_session(sess);
|
||||
if (ret)
|
||||
|
||||
@@ -1505,6 +1505,10 @@ struct lease_ctx_info *parse_lease_state(void *open_req)
|
||||
if (sizeof(struct lease_context_v2) == le32_to_cpu(cc->DataLength)) {
|
||||
struct create_lease_v2 *lc = (struct create_lease_v2 *)cc;
|
||||
|
||||
if (le16_to_cpu(cc->DataOffset) + le32_to_cpu(cc->DataLength) <
|
||||
sizeof(struct create_lease_v2) - 4)
|
||||
return NULL;
|
||||
|
||||
memcpy(lreq->lease_key, lc->lcontext.LeaseKey, SMB2_LEASE_KEY_SIZE);
|
||||
lreq->req_state = lc->lcontext.LeaseState;
|
||||
lreq->flags = lc->lcontext.LeaseFlags;
|
||||
@@ -1517,6 +1521,10 @@ struct lease_ctx_info *parse_lease_state(void *open_req)
|
||||
} else {
|
||||
struct create_lease *lc = (struct create_lease *)cc;
|
||||
|
||||
if (le16_to_cpu(cc->DataOffset) + le32_to_cpu(cc->DataLength) <
|
||||
sizeof(struct create_lease))
|
||||
return NULL;
|
||||
|
||||
memcpy(lreq->lease_key, lc->lcontext.LeaseKey, SMB2_LEASE_KEY_SIZE);
|
||||
lreq->req_state = lc->lcontext.LeaseState;
|
||||
lreq->flags = lc->lcontext.LeaseFlags;
|
||||
|
||||
+36
-6
@@ -1247,7 +1247,7 @@ int smb2_handle_negotiate(struct ksmbd_work *work)
|
||||
}
|
||||
|
||||
conn->srv_sec_mode = le16_to_cpu(rsp->SecurityMode);
|
||||
ksmbd_conn_set_need_negotiate(conn);
|
||||
ksmbd_conn_set_need_setup(conn);
|
||||
|
||||
err_out:
|
||||
if (rc)
|
||||
@@ -1268,6 +1268,9 @@ static int alloc_preauth_hash(struct ksmbd_session *sess,
|
||||
if (sess->Preauth_HashValue)
|
||||
return 0;
|
||||
|
||||
if (!conn->preauth_info)
|
||||
return -ENOMEM;
|
||||
|
||||
sess->Preauth_HashValue = kmemdup(conn->preauth_info->Preauth_HashValue,
|
||||
PREAUTH_HASHVALUE_SIZE, GFP_KERNEL);
|
||||
if (!sess->Preauth_HashValue)
|
||||
@@ -1671,6 +1674,11 @@ int smb2_sess_setup(struct ksmbd_work *work)
|
||||
|
||||
ksmbd_debug(SMB, "Received request for session setup\n");
|
||||
|
||||
if (!ksmbd_conn_need_setup(conn) && !ksmbd_conn_good(conn)) {
|
||||
work->send_no_response = 1;
|
||||
return rc;
|
||||
}
|
||||
|
||||
WORK_BUFFERS(work, req, rsp);
|
||||
|
||||
rsp->StructureSize = cpu_to_le16(9);
|
||||
@@ -1906,7 +1914,7 @@ out_err:
|
||||
if (try_delay) {
|
||||
ksmbd_conn_set_need_reconnect(conn);
|
||||
ssleep(5);
|
||||
ksmbd_conn_set_need_negotiate(conn);
|
||||
ksmbd_conn_set_need_setup(conn);
|
||||
}
|
||||
}
|
||||
smb2_set_err_rsp(work);
|
||||
@@ -2230,14 +2238,15 @@ int smb2_session_logoff(struct ksmbd_work *work)
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
ksmbd_destroy_file_table(&sess->file_table);
|
||||
down_write(&conn->session_lock);
|
||||
sess->state = SMB2_SESSION_EXPIRED;
|
||||
up_write(&conn->session_lock);
|
||||
|
||||
ksmbd_free_user(sess->user);
|
||||
sess->user = NULL;
|
||||
ksmbd_all_conn_set_status(sess_id, KSMBD_SESS_NEED_NEGOTIATE);
|
||||
if (sess->user) {
|
||||
ksmbd_free_user(sess->user);
|
||||
sess->user = NULL;
|
||||
}
|
||||
ksmbd_all_conn_set_status(sess_id, KSMBD_SESS_NEED_SETUP);
|
||||
|
||||
rsp->StructureSize = cpu_to_le16(4);
|
||||
err = ksmbd_iov_pin_rsp(work, rsp, sizeof(struct smb2_logoff_rsp));
|
||||
@@ -2699,6 +2708,13 @@ static int parse_durable_handle_context(struct ksmbd_work *work,
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (le16_to_cpu(context->DataOffset) +
|
||||
le32_to_cpu(context->DataLength) <
|
||||
sizeof(struct create_durable_reconn_v2_req)) {
|
||||
err = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
recon_v2 = (struct create_durable_reconn_v2_req *)context;
|
||||
persistent_id = recon_v2->Fid.PersistentFileId;
|
||||
dh_info->fp = ksmbd_lookup_durable_fd(persistent_id);
|
||||
@@ -2732,6 +2748,13 @@ static int parse_durable_handle_context(struct ksmbd_work *work,
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (le16_to_cpu(context->DataOffset) +
|
||||
le32_to_cpu(context->DataLength) <
|
||||
sizeof(struct create_durable_reconn_req)) {
|
||||
err = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
recon = (struct create_durable_reconn_req *)context;
|
||||
persistent_id = recon->Data.Fid.PersistentFileId;
|
||||
dh_info->fp = ksmbd_lookup_durable_fd(persistent_id);
|
||||
@@ -2757,6 +2780,13 @@ static int parse_durable_handle_context(struct ksmbd_work *work,
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (le16_to_cpu(context->DataOffset) +
|
||||
le32_to_cpu(context->DataLength) <
|
||||
sizeof(struct create_durable_req_v2)) {
|
||||
err = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
durable_v2_blob =
|
||||
(struct create_durable_req_v2 *)context;
|
||||
ksmbd_debug(SMB, "Request for durable v2 open\n");
|
||||
|
||||
+17
-4
@@ -270,6 +270,11 @@ static int sid_to_id(struct mnt_idmap *idmap,
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
if (psid->num_subauth == 0) {
|
||||
pr_err("%s: zero subauthorities!\n", __func__);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
if (sidtype == SIDOWNER) {
|
||||
kuid_t uid;
|
||||
uid_t id;
|
||||
@@ -1026,7 +1031,9 @@ int smb_inherit_dacl(struct ksmbd_conn *conn,
|
||||
struct dentry *parent = path->dentry->d_parent;
|
||||
struct mnt_idmap *idmap = mnt_idmap(path->mnt);
|
||||
int inherited_flags = 0, flags = 0, i, nt_size = 0, pdacl_size;
|
||||
int rc = 0, dacloffset, pntsd_type, pntsd_size, acl_len, aces_size;
|
||||
int rc = 0, pntsd_type, pntsd_size, acl_len, aces_size;
|
||||
unsigned int dacloffset;
|
||||
size_t dacl_struct_end;
|
||||
u16 num_aces, ace_cnt = 0;
|
||||
char *aces_base;
|
||||
bool is_dir = S_ISDIR(d_inode(path->dentry)->i_mode);
|
||||
@@ -1035,8 +1042,11 @@ int smb_inherit_dacl(struct ksmbd_conn *conn,
|
||||
parent, &parent_pntsd);
|
||||
if (pntsd_size <= 0)
|
||||
return -ENOENT;
|
||||
|
||||
dacloffset = le32_to_cpu(parent_pntsd->dacloffset);
|
||||
if (!dacloffset || (dacloffset + sizeof(struct smb_acl) > pntsd_size)) {
|
||||
if (!dacloffset ||
|
||||
check_add_overflow(dacloffset, sizeof(struct smb_acl), &dacl_struct_end) ||
|
||||
dacl_struct_end > (size_t)pntsd_size) {
|
||||
rc = -EINVAL;
|
||||
goto free_parent_pntsd;
|
||||
}
|
||||
@@ -1239,7 +1249,9 @@ int smb_check_perm_dacl(struct ksmbd_conn *conn, const struct path *path,
|
||||
struct smb_ntsd *pntsd = NULL;
|
||||
struct smb_acl *pdacl;
|
||||
struct posix_acl *posix_acls;
|
||||
int rc = 0, pntsd_size, acl_size, aces_size, pdacl_size, dacl_offset;
|
||||
int rc = 0, pntsd_size, acl_size, aces_size, pdacl_size;
|
||||
unsigned int dacl_offset;
|
||||
size_t dacl_struct_end;
|
||||
struct smb_sid sid;
|
||||
int granted = le32_to_cpu(*pdaccess & ~FILE_MAXIMAL_ACCESS_LE);
|
||||
struct smb_ace *ace;
|
||||
@@ -1258,7 +1270,8 @@ int smb_check_perm_dacl(struct ksmbd_conn *conn, const struct path *path,
|
||||
|
||||
dacl_offset = le32_to_cpu(pntsd->dacloffset);
|
||||
if (!dacl_offset ||
|
||||
(dacl_offset + sizeof(struct smb_acl) > pntsd_size))
|
||||
check_add_overflow(dacl_offset, sizeof(struct smb_acl), &dacl_struct_end) ||
|
||||
dacl_struct_end > (size_t)pntsd_size)
|
||||
goto err_out;
|
||||
|
||||
pdacl = (struct smb_acl *)((char *)pntsd + le32_to_cpu(pntsd->dacloffset));
|
||||
|
||||
@@ -28,6 +28,8 @@ struct page;
|
||||
|
||||
#define MAX_URETPROBE_DEPTH 64
|
||||
|
||||
#define UPROBE_NO_TRAMPOLINE_VADDR (~0UL)
|
||||
|
||||
struct uprobe_consumer {
|
||||
/*
|
||||
* handler() can return UPROBE_HANDLER_REMOVE to signal the need to
|
||||
|
||||
@@ -1898,8 +1898,8 @@ void uprobe_copy_process(struct task_struct *t, unsigned long flags)
|
||||
*/
|
||||
unsigned long uprobe_get_trampoline_vaddr(void)
|
||||
{
|
||||
unsigned long trampoline_vaddr = UPROBE_NO_TRAMPOLINE_VADDR;
|
||||
struct xol_area *area;
|
||||
unsigned long trampoline_vaddr = -1;
|
||||
|
||||
/* Pairs with xol_add_vma() smp_store_release() */
|
||||
area = READ_ONCE(current->mm->uprobes_state.xol_area); /* ^^^ */
|
||||
|
||||
@@ -120,7 +120,7 @@ void drv_remove_interface(struct ieee80211_local *local,
|
||||
* The virtual monitor interface doesn't get a debugfs
|
||||
* entry, so it's exempt here.
|
||||
*/
|
||||
if (sdata != local->monitor_sdata)
|
||||
if (sdata != rcu_access_pointer(local->monitor_sdata))
|
||||
ieee80211_debugfs_recreate_netdev(sdata,
|
||||
sdata->vif.valid_links);
|
||||
|
||||
|
||||
+3
-1
@@ -229,7 +229,8 @@ bindgen_skip_c_flags := -mno-fp-ret-in-387 -mpreferred-stack-boundary=% \
|
||||
-mfunction-return=thunk-extern -mrecord-mcount -mabi=lp64 \
|
||||
-mindirect-branch-cs-prefix -mstack-protector-guard% -mtraceback=no \
|
||||
-mno-pointers-to-nested-functions -mno-string \
|
||||
-mno-strict-align -mstrict-align \
|
||||
-mno-strict-align -mstrict-align -mdirect-extern-access \
|
||||
-mexplicit-relocs -mno-check-zero-division \
|
||||
-fconserve-stack -falign-jumps=% -falign-loops=% \
|
||||
-femit-struct-debug-baseonly -fno-ipa-cp-clone -fno-ipa-sra \
|
||||
-fno-partial-inlining -fplugin-arg-arm_ssp_per_task_plugin-% \
|
||||
@@ -243,6 +244,7 @@ bindgen_skip_c_flags := -mno-fp-ret-in-387 -mpreferred-stack-boundary=% \
|
||||
# Derived from `scripts/Makefile.clang`.
|
||||
BINDGEN_TARGET_x86 := x86_64-linux-gnu
|
||||
BINDGEN_TARGET_arm64 := aarch64-linux-gnu
|
||||
BINDGEN_TARGET_loongarch := loongarch64-linux-gnusf
|
||||
BINDGEN_TARGET := $(BINDGEN_TARGET_$(SRCARCH))
|
||||
|
||||
# All warnings are inhibited since GCC builds are very experimental,
|
||||
|
||||
Reference in New Issue
Block a user