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arm64: dts: mt8173: add MT8173 display PWM driver support node

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Add display PWM node in mt8173-evb.dts and mt8173.dtsi.

Signed-off-by: YH Huang <yh.huang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
YH Huang
2015-10-06 15:40:43 +08:00
committed by Matthias Brugger
parent b2c76e275f
commit 61aee93425
2 changed files with 35 additions and 0 deletions
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arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+13
View File
@@ -92,6 +92,13 @@
}; };
&pio { &pio {
disp_pwm0_pins: disp_pwm0_pins {
pins1 {
pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
output-low;
};
};
mmc0_pins_default: mmc0default { mmc0_pins_default: mmc0default {
pins_cmd_dat { pins_cmd_dat {
pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
@@ -190,6 +197,12 @@
}; };
}; };
&pwm0 {
pinctrl-names = "default";
pinctrl-0 = <&disp_pwm0_pins>;
status = "okay";
};
&pwrap { &pwrap {
pmic: mt6397 { pmic: mt6397 {
compatible = "mediatek,mt6397"; compatible = "mediatek,mt6397";
arch/arm64/boot/dts/mediatek/mt8173.dtsi
+22
View File
@@ -525,6 +525,28 @@
#clock-cells = <1>; #clock-cells = <1>;
}; };
pwm0: pwm@1401e000 {
compatible = "mediatek,mt8173-disp-pwm",
"mediatek,mt6595-disp-pwm";
reg = <0 0x1401e000 0 0x1000>;
#pwm-cells = <2>;
clocks = <&mmsys CLK_MM_DISP_PWM026M>,
<&mmsys CLK_MM_DISP_PWM0MM>;
clock-names = "main", "mm";
status = "disabled";
};
pwm1: pwm@1401f000 {
compatible = "mediatek,mt8173-disp-pwm",
"mediatek,mt6595-disp-pwm";
reg = <0 0x1401f000 0 0x1000>;
#pwm-cells = <2>;
clocks = <&mmsys CLK_MM_DISP_PWM126M>,
<&mmsys CLK_MM_DISP_PWM1MM>;
clock-names = "main", "mm";
status = "disabled";
};
imgsys: clock-controller@15000000 { imgsys: clock-controller@15000000 {
compatible = "mediatek,mt8173-imgsys", "syscon"; compatible = "mediatek,mt8173-imgsys", "syscon";
reg = <0 0x15000000 0 0x1000>; reg = <0 0x15000000 0 0x1000>;