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Merge master.kernel.org:/home/rmk/linux-2.6-arm

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* master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits)
  [ARM] 3389/1: typo and grammar fix
  [ARM] 3386/1: AT91RM9200 Clock update
  [ARM] 3384/1: AT91RM9200: Timer
  [ARM] 3382/1: ixp2000: unify defconfigs
  [ARM] 3381/1: ixp2000: fix slowport write timing control register fields
  [ARM] 3380/1: ixp2000: simplify ixdp2x00_master_npu() check
  [ARM] 3379/1: ixp2000: use generic 8250 debug macros
  [ARM] 3378/1: ixp2000: fix gpio interrupt handling
  [ARM] Quieten spurious IRQ detection
  [ARM] Use kcalloc to allocate counter_config array rather than kmalloc
  [ARM] Oprofile: dynamically allocate counter_config
  [ARM] Oprofile: Convert semaphore to mutex
  [ARM] 3376/2: S3C2410 - update defconfig
  [ARM] 3375/1: S3C2440 - fix osiris machine build
  [ARM] 3374/1: ep93xx: gpio interrupt support
  [ARM] 3361/1: S3C24XX - add USB bus clock source
  [ARM] 3360/1: S3C2440 - add set rate methods and camera clock
  [ARM] 3359/1: S3C24XX - add support for clk_set_rate
  [ARM] Convert kmalloc+memset to kzalloc
  [ARM] 3373/1: move uengine loader to arch/arm/common
  ...
This commit is contained in:
Linus Torvalds
2006-03-22 17:32:09 -08:00
parent 4658f79bec 3a2916aa28
commit 591eb85ecd
155 changed files with 3030 additions and 3920 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/asm-arm/arch-aaec2000/param.h
-15
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@@ -1,15 +0,0 @@
/*
* linux/include/asm-arm/arch-aaec2000/param.h
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_PARAM_H
#define __ASM_ARCH_PARAM_H
#endif /* __ASM_ARCH_PARAM_H */
include/asm-arm/arch-at91rm9200/param.h
-28
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@@ -1,28 +0,0 @@
/*
* include/asm-arm/arch-at91rm9200/param.h
*
* Copyright (C) 2003 SAN People
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_PARAM_H
#define __ASM_ARCH_PARAM_H
/*
* We use default params
*/
#endif
include/asm-arm/arch-cl7500/debug-macro.S
+2 -12
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@@ -17,15 +17,5 @@
orr \rx, \rx, #0x00000be0
.endm
.macro senduart,rd,rx
strb \rd, [\rx]
.endm
.macro busyuart,rd,rx
.endm
.macro waituart,rd,rx
1001: ldrb \rd, [\rx, #0x14]
tst \rd, #0x20
beq 1001b
.endm
#define UART_SHIFT 2
#include <asm/hardware/debug-8250.S>
include/asm-arm/arch-cl7500/param.h
-5
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@@ -1,5 +0,0 @@
/*
* linux/include/asm-arm/arch-cl7500/param.h
*
* Copyright (C) 1999 Nexus Electronics Ltd
*/
include/asm-arm/arch-clps711x/param.h
-19
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@@ -1,19 +0,0 @@
/*
* linux/include/asm-arm/arch-clps711x/param.h
*
* Copyright (C) 2000 Deep Blue Solutions Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
include/asm-arm/arch-ebsa110/debug-macro.S
+3 -16
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@@ -16,19 +16,6 @@
orr \rx, \rx, #0x00000be0
.endm
.macro senduart,rd,rx
strb \rd, [\rx]
.endm
.macro busyuart,rd,rx
1002: ldrb \rd, [\rx, #0x14]
and \rd, \rd, #0x60
teq \rd, #0x60
bne 1002b
.endm
.macro waituart,rd,rx
1001: ldrb \rd, [\rx, #0x18]
tst \rd, #0x10
beq 1001b
.endm
#define UART_SHIFT 2
#define FLOW_CONTROL
#include <asm/hardware/debug-8250.h>
include/asm-arm/arch-ebsa110/param.h
-4
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@@ -1,4 +0,0 @@
/*
* linux/include/asm-arm/arch-ebsa110/param.h
*/
#define HZ 200
include/asm-arm/arch-ebsa285/debug-macro.S
+3 -15
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@@ -23,22 +23,10 @@
orr \rx, \rx, #0x000003f8
.endm
.macro senduart,rd,rx
strb \rd, [\rx]
.endm
#define UART_SHIFT 0
#define FLOW_CONTROL
#include <asm/hardware/debug-8250.S>
.macro busyuart,rd,rx
1002: ldrb \rd, [\rx, #0x5]
and \rd, \rd, #0x60
teq \rd, #0x60
bne 1002b
.endm
.macro waituart,rd,rx
1001: ldrb \rd, [\rx, #0x6]
tst \rd, #0x10
beq 1001b
.endm
#else
/* For EBSA285 debugging */
.equ dc21285_high, ARMCSR_BASE & 0xff000000
include/asm-arm/arch-ebsa285/param.h
-3
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@@ -1,3 +0,0 @@
/*
* linux/include/asm-arm/arch-ebsa285/param.h
*/
include/asm-arm/arch-ep93xx/debug-macro.S
+22
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@@ -0,0 +1,22 @@
/*
* linux/include/asm-arm/arch-ep93xx/debug-macro.S
* Debugging macro include header
*
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#include <asm/arch/ep93xx-regs.h>
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
ldreq \rx, =EP93XX_APB_PHYS_BASE @ Physical base
ldrne \rx, =EP93XX_APB_VIRT_BASE @ virtual base
orr \rx, \rx, #0x000c0000
.endm
#include <asm/hardware/debug-pl01x.S>
include/asm-arm/arch-ep93xx/dma.h
+3
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@@ -0,0 +1,3 @@
/*
* linux/include/asm-arm/arch-ep93xx/dma.h
*/
include/asm-arm/arch-ep93xx/entry-macro.S
+53
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@@ -0,0 +1,53 @@
/*
* linux/include/asm-arm/arch-ep93xx/entry-macro.S
* IRQ demultiplexing for EP93xx
*
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#include <asm/arch/ep93xx-regs.h>
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =(EP93XX_AHB_VIRT_BASE)
orr \base, \base, #0x000b0000
mov \irqnr, #0
ldr \irqstat, [\base] @ lower 32 interrupts
cmp \irqstat, #0
bne 1001f
eor \base, \base, #0x00070000
ldr \irqstat, [\base] @ upper 32 interrupts
cmp \irqstat, #0
beq 1002f
mov \irqnr, #0x20
1001:
movs \tmp, \irqstat, lsl #16
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #16
movs \tmp, \irqstat, lsl #8
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #8
movs \tmp, \irqstat, lsl #4
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #4
movs \tmp, \irqstat, lsl #2
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #2
movs \tmp, \irqstat, lsl #1
addeq \irqnr, \irqnr, #1
orrs \base, \base, #1
1002:
.endm
include/asm-arm/arch-ep93xx/ep93xx-regs.h
+125
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@@ -0,0 +1,125 @@
/*
* linux/include/asm-arm/arch-ep93xx/ep93xx-regs.h
*/
#ifndef __ASM_ARCH_EP93XX_REGS_H
#define __ASM_ARCH_EP93XX_REGS_H
/*
* EP93xx linux memory map:
*
* virt phys size
* fe800000 5M per-platform mappings
* fed00000 80800000 2M APB
* fef00000 80000000 1M AHB
*/
#define EP93XX_AHB_PHYS_BASE 0x80000000
#define EP93XX_AHB_VIRT_BASE 0xfef00000
#define EP93XX_AHB_SIZE 0x00100000
#define EP93XX_APB_PHYS_BASE 0x80800000
#define EP93XX_APB_VIRT_BASE 0xfed00000
#define EP93XX_APB_SIZE 0x00200000
/* AHB peripherals */
#define EP93XX_DMA_BASE (EP93XX_AHB_VIRT_BASE + 0x00000000)
#define EP93XX_ETHERNET_BASE (EP93XX_AHB_VIRT_BASE + 0x00010000)
#define EP93XX_USB_BASE (EP93XX_AHB_VIRT_BASE + 0x00020000)
#define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000)
#define EP93XX_RASTER_BASE (EP93XX_AHB_VIRT_BASE + 0x00030000)
#define EP93XX_GRAPHICS_ACCEL_BASE (EP93XX_AHB_VIRT_BASE + 0x00040000)
#define EP93XX_SDRAM_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00060000)
#define EP93XX_PCMCIA_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00080000)
#define EP93XX_BOOT_ROM_BASE (EP93XX_AHB_VIRT_BASE + 0x00090000)
#define EP93XX_IDE_BASE (EP93XX_AHB_VIRT_BASE + 0x000a0000)
#define EP93XX_VIC1_BASE (EP93XX_AHB_VIRT_BASE + 0x000b0000)
#define EP93XX_VIC2_BASE (EP93XX_AHB_VIRT_BASE + 0x000c0000)
/* APB peripherals */
#define EP93XX_TIMER_BASE (EP93XX_APB_VIRT_BASE + 0x00010000)
#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
#define EP93XX_I2S_BASE (EP93XX_APB_VIRT_BASE + 0x00020000)
#define EP93XX_SECURITY_BASE (EP93XX_APB_VIRT_BASE + 0x00030000)
#define EP93XX_GPIO_BASE (EP93XX_APB_VIRT_BASE + 0x00040000)
#define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x))
#define EP93XX_GPIO_A_INT_TYPE1 EP93XX_GPIO_REG(0x90)
#define EP93XX_GPIO_A_INT_TYPE2 EP93XX_GPIO_REG(0x94)
#define EP93XX_GPIO_A_INT_ACK EP93XX_GPIO_REG(0x98)
#define EP93XX_GPIO_A_INT_ENABLE EP93XX_GPIO_REG(0x9c)
#define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0)
#define EP93XX_GPIO_B_INT_TYPE1 EP93XX_GPIO_REG(0xac)
#define EP93XX_GPIO_B_INT_TYPE2 EP93XX_GPIO_REG(0xb0)
#define EP93XX_GPIO_B_INT_ACK EP93XX_GPIO_REG(0xb4)
#define EP93XX_GPIO_B_INT_ENABLE EP93XX_GPIO_REG(0xb8)
#define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc)
#define EP93XX_AAC_BASE (EP93XX_APB_VIRT_BASE + 0x00080000)
#define EP93XX_SPI_BASE (EP93XX_APB_VIRT_BASE + 0x000a0000)
#define EP93XX_IRDA_BASE (EP93XX_APB_VIRT_BASE + 0x000b0000)
#define EP93XX_UART1_BASE (EP93XX_APB_VIRT_BASE + 0x000c0000)
#define EP93XX_UART1_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000c0000)
#define EP93XX_UART2_BASE (EP93XX_APB_VIRT_BASE + 0x000d0000)
#define EP93XX_UART2_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000d0000)
#define EP93XX_UART3_BASE (EP93XX_APB_VIRT_BASE + 0x000e0000)
#define EP93XX_UART3_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000e0000)
#define EP93XX_KEY_MATRIX_BASE (EP93XX_APB_VIRT_BASE + 0x000f0000)
#define EP93XX_ADC_BASE (EP93XX_APB_VIRT_BASE + 0x00100000)
#define EP93XX_TOUCHSCREEN_BASE (EP93XX_APB_VIRT_BASE + 0x00100000)
#define EP93XX_PWM_BASE (EP93XX_APB_VIRT_BASE + 0x00110000)
#define EP93XX_RTC_BASE (EP93XX_APB_VIRT_BASE + 0x00120000)
#define EP93XX_SYSCON_BASE (EP93XX_APB_VIRT_BASE + 0x00130000)
#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x))
#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00)
#define EP93XX_SYSCON_CLOCK_CONTROL EP93XX_SYSCON_REG(0x04)
#define EP93XX_SYSCON_CLOCK_UARTBAUD 0x20000000
#define EP93XX_SYSCON_CLOCK_USH_EN 0x10000000
#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08)
#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c)
#define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80)
#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE 0x00800000
#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
#define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000)
#endif
include/asm-arm/arch-ep93xx/gesbc9312.h
+3
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@@ -0,0 +1,3 @@
/*
* linux/include/asm-arm/arch-ep93xx/gesbc9312.h
*/
include/asm-arm/arch-ep93xx/gpio.h
+107
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@@ -0,0 +1,107 @@
/*
* linux/include/asm-arm/arch-ep93xx/gpio.h
*/
#ifndef __ASM_ARCH_GPIO_H
#define __ASM_ARCH_GPIO_H
#define GPIO_IN 0
#define GPIO_OUT 1
#define EP93XX_GPIO_LOW 0
#define EP93XX_GPIO_HIGH 1
extern void gpio_line_config(int line, int direction);
extern int gpio_line_get(int line);
extern void gpio_line_set(int line, int value);
/* GPIO port A. */
#define EP93XX_GPIO_LINE_A(x) ((x) + 0)
#define EP93XX_GPIO_LINE_EGPIO0 EP93XX_GPIO_LINE_A(0)
#define EP93XX_GPIO_LINE_EGPIO1 EP93XX_GPIO_LINE_A(1)
#define EP93XX_GPIO_LINE_EGPIO2 EP93XX_GPIO_LINE_A(2)
#define EP93XX_GPIO_LINE_EGPIO3 EP93XX_GPIO_LINE_A(3)
#define EP93XX_GPIO_LINE_EGPIO4 EP93XX_GPIO_LINE_A(4)
#define EP93XX_GPIO_LINE_EGPIO5 EP93XX_GPIO_LINE_A(5)
#define EP93XX_GPIO_LINE_EGPIO6 EP93XX_GPIO_LINE_A(6)
#define EP93XX_GPIO_LINE_EGPIO7 EP93XX_GPIO_LINE_A(7)
/* GPIO port B. */
#define EP93XX_GPIO_LINE_B(x) ((x) + 8)
#define EP93XX_GPIO_LINE_EGPIO8 EP93XX_GPIO_LINE_B(0)
#define EP93XX_GPIO_LINE_EGPIO9 EP93XX_GPIO_LINE_B(1)
#define EP93XX_GPIO_LINE_EGPIO10 EP93XX_GPIO_LINE_B(2)
#define EP93XX_GPIO_LINE_EGPIO11 EP93XX_GPIO_LINE_B(3)
#define EP93XX_GPIO_LINE_EGPIO12 EP93XX_GPIO_LINE_B(4)
#define EP93XX_GPIO_LINE_EGPIO13 EP93XX_GPIO_LINE_B(5)
#define EP93XX_GPIO_LINE_EGPIO14 EP93XX_GPIO_LINE_B(6)
#define EP93XX_GPIO_LINE_EGPIO15 EP93XX_GPIO_LINE_B(7)
/* GPIO port C. */
#define EP93XX_GPIO_LINE_C(x) ((x) + 16)
#define EP93XX_GPIO_LINE_ROW0 EP93XX_GPIO_LINE_C(0)
#define EP93XX_GPIO_LINE_ROW1 EP93XX_GPIO_LINE_C(1)
#define EP93XX_GPIO_LINE_ROW2 EP93XX_GPIO_LINE_C(2)
#define EP93XX_GPIO_LINE_ROW3 EP93XX_GPIO_LINE_C(3)
#define EP93XX_GPIO_LINE_ROW4 EP93XX_GPIO_LINE_C(4)
#define EP93XX_GPIO_LINE_ROW5 EP93XX_GPIO_LINE_C(5)
#define EP93XX_GPIO_LINE_ROW6 EP93XX_GPIO_LINE_C(6)
#define EP93XX_GPIO_LINE_ROW7 EP93XX_GPIO_LINE_C(7)
/* GPIO port D. */
#define EP93XX_GPIO_LINE_D(x) ((x) + 24)
#define EP93XX_GPIO_LINE_COL0 EP93XX_GPIO_LINE_D(0)
#define EP93XX_GPIO_LINE_COL1 EP93XX_GPIO_LINE_D(1)
#define EP93XX_GPIO_LINE_COL2 EP93XX_GPIO_LINE_D(2)
#define EP93XX_GPIO_LINE_COL3 EP93XX_GPIO_LINE_D(3)
#define EP93XX_GPIO_LINE_COL4 EP93XX_GPIO_LINE_D(4)
#define EP93XX_GPIO_LINE_COL5 EP93XX_GPIO_LINE_D(5)
#define EP93XX_GPIO_LINE_COL6 EP93XX_GPIO_LINE_D(6)
#define EP93XX_GPIO_LINE_COL7 EP93XX_GPIO_LINE_D(7)
/* GPIO port E. */
#define EP93XX_GPIO_LINE_E(x) ((x) + 32)
#define EP93XX_GPIO_LINE_GRLED EP93XX_GPIO_LINE_E(0)
#define EP93XX_GPIO_LINE_RDLED EP93XX_GPIO_LINE_E(1)
#define EP93XX_GPIO_LINE_DIORn EP93XX_GPIO_LINE_E(2)
#define EP93XX_GPIO_LINE_IDECS1n EP93XX_GPIO_LINE_E(3)
#define EP93XX_GPIO_LINE_IDECS2n EP93XX_GPIO_LINE_E(4)
#define EP93XX_GPIO_LINE_IDEDA0 EP93XX_GPIO_LINE_E(5)
#define EP93XX_GPIO_LINE_IDEDA1 EP93XX_GPIO_LINE_E(6)
#define EP93XX_GPIO_LINE_IDEDA2 EP93XX_GPIO_LINE_E(7)
/* GPIO port F. */
#define EP93XX_GPIO_LINE_F(x) ((x) + 40)
#define EP93XX_GPIO_LINE_WP EP93XX_GPIO_LINE_F(0)
#define EP93XX_GPIO_LINE_MCCD1 EP93XX_GPIO_LINE_F(1)
#define EP93XX_GPIO_LINE_MCCD2 EP93XX_GPIO_LINE_F(2)
#define EP93XX_GPIO_LINE_MCBVD1 EP93XX_GPIO_LINE_F(3)
#define EP93XX_GPIO_LINE_MCBVD2 EP93XX_GPIO_LINE_F(4)
#define EP93XX_GPIO_LINE_VS1 EP93XX_GPIO_LINE_F(5)
#define EP93XX_GPIO_LINE_READY EP93XX_GPIO_LINE_F(6)
#define EP93XX_GPIO_LINE_VS2 EP93XX_GPIO_LINE_F(7)
/* GPIO port G. */
#define EP93XX_GPIO_LINE_G(x) ((x) + 48)
#define EP93XX_GPIO_LINE_EECLK EP93XX_GPIO_LINE_G(0)
#define EP93XX_GPIO_LINE_EEDAT EP93XX_GPIO_LINE_G(1)
#define EP93XX_GPIO_LINE_SLA0 EP93XX_GPIO_LINE_G(2)
#define EP93XX_GPIO_LINE_SLA1 EP93XX_GPIO_LINE_G(3)
#define EP93XX_GPIO_LINE_DD12 EP93XX_GPIO_LINE_G(4)
#define EP93XX_GPIO_LINE_DD13 EP93XX_GPIO_LINE_G(5)
#define EP93XX_GPIO_LINE_DD14 EP93XX_GPIO_LINE_G(6)
#define EP93XX_GPIO_LINE_DD15 EP93XX_GPIO_LINE_G(7)
/* GPIO port H. */
#define EP93XX_GPIO_LINE_H(x) ((x) + 56)
#define EP93XX_GPIO_LINE_DD0 EP93XX_GPIO_LINE_H(0)
#define EP93XX_GPIO_LINE_DD1 EP93XX_GPIO_LINE_H(1)
#define EP93XX_GPIO_LINE_DD2 EP93XX_GPIO_LINE_H(2)
#define EP93XX_GPIO_LINE_DD3 EP93XX_GPIO_LINE_H(3)
#define EP93XX_GPIO_LINE_DD4 EP93XX_GPIO_LINE_H(4)
#define EP93XX_GPIO_LINE_DD5 EP93XX_GPIO_LINE_H(5)
#define EP93XX_GPIO_LINE_DD6 EP93XX_GPIO_LINE_H(6)
#define EP93XX_GPIO_LINE_DD7 EP93XX_GPIO_LINE_H(7)
#endif
include/asm-arm/arch-ep93xx/hardware.h
+12
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@@ -0,0 +1,12 @@
/*
* linux/include/asm-arm/arch-ep93xx/hardware.h
*/
#include "ep93xx-regs.h"
#define pcibios_assign_all_busses() 0
#include "platform.h"
#include "gesbc9312.h"
#include "ts72xx.h"
include/asm-arm/arch-ep93xx/io.h
+8
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@@ -0,0 +1,8 @@
/*
* linux/include/asm-arm/arch-ep93xx/io.h
*/
#define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((void __iomem *)(p))
#define __mem_pci(p) (p)
include/asm-arm/arch-ep93xx/irqs.h
+80
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@@ -0,0 +1,80 @@
/*
* linux/include/asm-arm/arch-ep93xx/irqs.h
*/
#ifndef __ASM_ARCH_IRQS_H
#define __ASM_ARCH_IRQS_H
#define IRQ_EP93XX_COMMRX 2
#define IRQ_EP93XX_COMMTX 3
#define IRQ_EP93XX_TIMER1 4
#define IRQ_EP93XX_TIMER2 5
#define IRQ_EP93XX_AACINTR 6
#define IRQ_EP93XX_DMAM2P0 7
#define IRQ_EP93XX_DMAM2P1 8
#define IRQ_EP93XX_DMAM2P2 9
#define IRQ_EP93XX_DMAM2P3 10
#define IRQ_EP93XX_DMAM2P4 11
#define IRQ_EP93XX_DMAM2P5 12
#define IRQ_EP93XX_DMAM2P6 13
#define IRQ_EP93XX_DMAM2P7 14
#define IRQ_EP93XX_DMAM2P8 15
#define IRQ_EP93XX_DMAM2P9 16
#define IRQ_EP93XX_DMAM2M0 17
#define IRQ_EP93XX_DMAM2M1 18
#define IRQ_EP93XX_GPIO0MUX 20
#define IRQ_EP93XX_GPIO1MUX 21
#define IRQ_EP93XX_GPIO2MUX 22
#define IRQ_EP93XX_GPIO3MUX 22
#define IRQ_EP93XX_UART1RX 23
#define IRQ_EP93XX_UART1TX 24
#define IRQ_EP93XX_UART2RX 25
#define IRQ_EP93XX_UART2TX 26
#define IRQ_EP93XX_UART3RX 27
#define IRQ_EP93XX_UART3TX 28
#define IRQ_EP93XX_KEY 29
#define IRQ_EP93XX_TOUCH 30
#define EP93XX_VIC1_VALID_IRQ_MASK 0x7ffffffc
#define IRQ_EP93XX_EXT0 32
#define IRQ_EP93XX_EXT1 33
#define IRQ_EP93XX_EXT2 34
#define IRQ_EP93XX_64HZ 35
#define IRQ_EP93XX_WATCHDOG 36
#define IRQ_EP93XX_RTC 37
#define IRQ_EP93XX_IRDA 38
#define IRQ_EP93XX_ETHERNET 39
#define IRQ_EP93XX_EXT3 40
#define IRQ_EP93XX_PROG 41
#define IRQ_EP93XX_1HZ 42
#define IRQ_EP93XX_VSYNC 43
#define IRQ_EP93XX_VIDEO_FIFO 44
#define IRQ_EP93XX_SSP1RX 45
#define IRQ_EP93XX_SSP1TX 46
#define IRQ_EP93XX_GPIO4MUX 47
#define IRQ_EP93XX_GPIO5MUX 48
#define IRQ_EP93XX_GPIO6MUX 49
#define IRQ_EP93XX_GPIO7MUX 50
#define IRQ_EP93XX_TIMER3 51
#define IRQ_EP93XX_UART1 52
#define IRQ_EP93XX_SSP 53
#define IRQ_EP93XX_UART2 54
#define IRQ_EP93XX_UART3 55
#define IRQ_EP93XX_USB 56
#define IRQ_EP93XX_ETHERNET_PME 57
#define IRQ_EP93XX_DSP 58
#define IRQ_EP93XX_GPIO_AB 59
#define IRQ_EP93XX_SAI 60
#define EP93XX_VIC2_VALID_IRQ_MASK 0x1fffffff
#define IRQ_EP93XX_GPIO(x) (64 + (x))
#define NR_EP93XX_IRQS IRQ_EP93XX_GPIO(16)
#define EP93XX_BOARD_IRQ(x) (NR_EP93XX_IRQS + (x))
#define EP93XX_BOARD_IRQS 32
#define NR_IRQS (NR_EP93XX_IRQS + EP93XX_BOARD_IRQS)
#endif
include/asm-arm/arch-ep93xx/memory.h
+14
View File
@@ -0,0 +1,14 @@
/*
* linux/include/asm-arm/arch-ep93xx/memory.h
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x00000000)
#define __bus_to_virt(x) __phys_to_virt(x)
#define __virt_to_bus(x) __virt_to_phys(x)
#endif
include/asm-arm/arch-ep93xx/platform.h
+14
View File
@@ -0,0 +1,14 @@
/*
* linux/include/asm-arm/arch-ep93xx/platform.h
*/
#ifndef __ASSEMBLY__
void ep93xx_map_io(void);
void ep93xx_init_irq(void);
void ep93xx_init_time(unsigned long);
void ep93xx_init_devices(void);
extern struct sys_timer ep93xx_timer;
#endif
include/asm-arm/arch-ep93xx/system.h
+26
View File
@@ -0,0 +1,26 @@
/*
* linux/include/asm-arm/arch-ep93xx/system.h
*/
#include <asm/hardware.h>
static inline void arch_idle(void)
{
cpu_do_idle();
}
static inline void arch_reset(char mode)
{
u32 devicecfg;
local_irq_disable();
devicecfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
__raw_writel(devicecfg | 0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
__raw_writel(devicecfg & ~0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
while (1)
;
}
include/asm-arm/arch-ep93xx/timex.h
+5
View File
@@ -0,0 +1,5 @@
/*
* linux/include/asm-arm/arch-ep93xx/timex.h
*/
#define CLOCK_TICK_RATE 983040
include/asm-arm/arch-ep93xx/ts72xx.h
+90
View File
@@ -0,0 +1,90 @@
/*
* linux/include/asm-arm/arch-ep93xx/ts72xx.h
*/
/*
* TS72xx memory map:
*
* virt phys size
* febff000 22000000 4K model number register
* febfe000 22400000 4K options register
* febfd000 22800000 4K options register #2
* febfc000 [67]0000000 4K NAND data register
* febfb000 [67]0400000 4K NAND control register
* febfa000 [67]0800000 4K NAND busy register
*/
#define TS72XX_MODEL_PHYS_BASE 0x22000000
#define TS72XX_MODEL_VIRT_BASE 0xfebff000
#define TS72XX_MODEL_SIZE 0x00001000
#define TS72XX_MODEL_TS7200 0x00
#define TS72XX_MODEL_TS7250 0x01
#define TS72XX_MODEL_TS7260 0x02
#define TS72XX_OPTIONS_PHYS_BASE 0x22400000
#define TS72XX_OPTIONS_VIRT_BASE 0xfebfe000
#define TS72XX_OPTIONS_SIZE 0x00001000
#define TS72XX_OPTIONS_COM2_RS485 0x02
#define TS72XX_OPTIONS_MAX197 0x01
#define TS72XX_OPTIONS2_PHYS_BASE 0x22800000
#define TS72XX_OPTIONS2_VIRT_BASE 0xfebfd000
#define TS72XX_OPTIONS2_SIZE 0x00001000
#define TS72XX_OPTIONS2_TS9420 0x04
#define TS72XX_OPTIONS2_TS9420_BOOT 0x02
#define TS72XX_NOR_PHYS_BASE 0x60000000
#define TS72XX_NOR2_PHYS_BASE 0x62000000
#define TS72XX_NAND1_DATA_PHYS_BASE 0x60000000
#define TS72XX_NAND2_DATA_PHYS_BASE 0x70000000
#define TS72XX_NAND_DATA_VIRT_BASE 0xfebfc000
#define TS72XX_NAND_DATA_SIZE 0x00001000
#define TS72XX_NAND1_CONTROL_PHYS_BASE 0x60400000
#define TS72XX_NAND2_CONTROL_PHYS_BASE 0x70400000
#define TS72XX_NAND_CONTROL_VIRT_BASE 0xfebfb000
#define TS72XX_NAND_CONTROL_SIZE 0x00001000
#define TS72XX_NAND1_BUSY_PHYS_BASE 0x60800000
#define TS72XX_NAND2_BUSY_PHYS_BASE 0x70800000
#define TS72XX_NAND_BUSY_VIRT_BASE 0xfebfa000
#define TS72XX_NAND_BUSY_SIZE 0x00001000
#ifndef __ASSEMBLY__
#include <asm/io.h>
static inline int board_is_ts7200(void)
{
return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7200;
}
static inline int board_is_ts7250(void)
{
return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7250;
}
static inline int board_is_ts7260(void)
{
return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7260;
}
static inline int is_max197_installed(void)
{
return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) &
TS72XX_OPTIONS_MAX197);
}
static inline int is_ts9420_installed(void)
{
return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) &
TS72XX_OPTIONS2_TS9420);
}
#endif
include/asm-arm/arch-ep93xx/uncompress.h
+53
View File
@@ -0,0 +1,53 @@
/*
* linux/include/asm-arm/arch-ep93xx/uncompress.h
*
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#include <asm/arch/ep93xx-regs.h>
static unsigned char __raw_readb(unsigned int ptr)
{
return *((volatile unsigned char *)ptr);
}
static void __raw_writeb(unsigned char value, unsigned int ptr)
{
*((volatile unsigned char *)ptr) = value;
}
#define PHYS_UART1_DATA 0x808c0000
#define PHYS_UART1_FLAG 0x808c0018
#define UART1_FLAG_TXFF 0x20
static __inline__ void putc(char c)
{
int i;
for (i = 0; i < 1000; i++) {
/* Transmit fifo not full? */
if (!(__raw_readb(PHYS_UART1_FLAG) & UART1_FLAG_TXFF))
break;
}
__raw_writeb(c, PHYS_UART1_DATA);
}
static void putstr(const char *s)
{
while (*s) {
putc(*s);
if (*s == '\n')
putc('\r');
s++;
}
}
#define arch_decomp_setup()
#define arch_decomp_wdog()
include/asm-arm/arch-ep93xx/vmalloc.h
+5
View File
@@ -0,0 +1,5 @@
/*
* linux/include/asm-arm/arch-ep93xx/vmalloc.h
*/
#define VMALLOC_END 0xfe800000
include/asm-arm/arch-h720x/irq.h
-14
View File
@@ -1,14 +0,0 @@
/*
* include/asm-arm/arch-h720x/irq.h
*
* Copyright (C) 2000-2002 Jungjun Kim
* (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>
* (C) 2003 Thomas Gleixner <tglx@linutronix.de>
*/
#ifndef __ASM_ARCH_IRQ_H
#define __ASM_ARCH_IRQ_H
extern void __init h720x_init_irq (void);
#endif /* __ASM_ARCH_IRQ_H */
include/asm-arm/arch-h720x/param.h
-10
View File
@@ -1,10 +0,0 @@
/*
* linux/include/asm-arm/arch-h720x/param.h
*
* Copyright (C) 2000 Jungjun Kim
*/
#ifndef __ASM_ARCH_PARAM_H
#define __ASM_ARCH_PARAM_H
#endif
include/asm-arm/arch-imx/irq.h
-20
View File
@@ -1,20 +0,0 @@
/*
* linux/include/asm-arm/arch-imxads/irq.h
*
* Copyright (C) 1999 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define fixup_irq(i) (i)
include/asm-arm/arch-imx/param.h
-19
View File
@@ -1,19 +0,0 @@
/*
* linux/include/asm-arm/arch-imx/param.h
*
* Copyright (C) 1999 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
include/asm-arm/arch-integrator/debug-macro.S
+1 -17
View File
@@ -11,8 +11,6 @@
*
*/
#include <linux/amba/serial.h>
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
@@ -21,18 +19,4 @@
addne \rx, \rx, #0x16000000 >> 4
.endm
.macro senduart,rd,rx
strb \rd, [\rx, #UART01x_DR]
.endm
.macro waituart,rd,rx
1001: ldr \rd, [\rx, #0x18] @ UARTFLG
tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full
bne 1001b
.endm
.macro busyuart,rd,rx
1001: ldr \rd, [\rx, #0x18] @ UARTFLG
tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy
bne 1001b
.endm
#include <asm/hardware/debug-pl01x.S>
include/asm-arm/arch-integrator/param.h
-19
View File
@@ -1,19 +0,0 @@
/*
* linux/include/asm-arm/arch-integrator/param.h
*
* Copyright (C) 1999 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
include/asm-arm/arch-iop3xx/debug-macro.S
+3 -16
View File
@@ -28,21 +28,8 @@
#endif
.endm
.macro senduart,rd,rx
strb \rd, [\rx]
.endm
.macro busyuart,rd,rx
1002: ldrb \rd, [\rx, #0x5]
and \rd, \rd, #0x60
teq \rd, #0x60
bne 1002b
.endm
.macro waituart,rd,rx
#if !defined(CONFIG_ARCH_IQ80321) || !defined(CONFIG_ARCH_IQ31244) || !defined(CONFIG_ARCH_IQ80331)
1001: ldrb \rd, [\rx, #0x6]
tst \rd, #0x10
beq 1001b
#define FLOW_CONTROL
#endif
.endm
#define UART_SHIFT 0
#include <asm/hardware/debug-8250.S>
include/asm-arm/arch-iop3xx/param.h
-3
View File
@@ -1,3 +0,0 @@
/*
* linux/include/asm-arm/arch-iop3xx/param.h
*/
include/asm-arm/arch-ixp2000/debug-macro.S
+2 -15
View File
@@ -23,18 +23,5 @@
#endif
.endm
.macro senduart,rd,rx
strb \rd, [\rx]
.endm
.macro busyuart,rd,rx
1002: ldrb \rd, [\rx, #0x14]
tst \rd, #0x20
beq 1002b
.endm
.macro waituart,rd,rx
nop
nop
nop
.endm
#define UART_SHIFT 2
#include <asm/hardware/debug-8250.S>
include/asm-arm/arch-ixp2000/irq.h
-13
View File
@@ -1,13 +0,0 @@
/*
* linux/include/asm-arm/arch-ixp2000/irq.h
*
* Copyright (C) 2002 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define fixup_irq(irq) (irq)
include/asm-arm/arch-ixp2000/ixdp2x00.h
+2 -3
View File
@@ -72,12 +72,11 @@
#ifndef __ASSEMBLY__
/*
* Master NPU will always have flash and be PCI master.
* Slave NPU may or may not have flash but will never be PCI master.
* The master NPU is always PCI master.
*/
static inline unsigned int ixdp2x00_master_npu(void)
{
return ((ixp2000_has_flash()) && (ixp2000_is_pcimaster()));
return !!ixp2000_is_pcimaster();
}
/*
include/asm-arm/arch-ixp2000/ixp2000-regs.h
+2 -2
View File
@@ -353,8 +353,8 @@
* Masks and shifts for various fields in the WTC and RTC registers.
*/
#define SLOWPORT_WRTC_MASK_HD 0x0003
#define SLOWPORT_WRTC_MASK_SU 0x003c
#define SLOWPORT_WRTC_MASK_PW 0x03c0
#define SLOWPORT_WRTC_MASK_PW 0x003c
#define SLOWPORT_WRTC_MASK_SU 0x03c0
#define SLOWPORT_WRTC_SHIFT_HD 0x00
#define SLOWPORT_WRTC_SHIFT_SU 0x02
include/asm-arm/arch-ixp2000/param.h
-3
View File
@@ -1,3 +0,0 @@
/*
* linux/include/asm-arm/arch-ixp2000/param.h
*/
include/asm-arm/arch-ixp2000/system.h
+1 -1
View File
@@ -37,7 +37,7 @@ static inline void arch_reset(char mode)
* to cause a complete reset of the CPU and all external devices
* and move the flash bank register back to 0.
*/
if (machine_is_ixdp2801()) {
if (machine_is_ixdp2801() || machine_is_ixdp28x5()) {
unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
include/asm-arm/arch-ixp4xx/debug-macro.S
+2 -13
View File
@@ -20,16 +20,5 @@
@ byte writes used - Big Endian.
.endm
.macro senduart,rd,rx
strb \rd, [\rx]
.endm
.macro waituart,rd,rx
1002: ldrb \rd, [\rx, #0x14]
and \rd, \rd, #0x60 @ check THRE and TEMT bits
teq \rd, #0x60
bne 1002b
.endm
.macro busyuart,rd,rx
.endm
#define UART_SHIFT 2
#include <asm/hardware/debug-8250.S>
include/asm-arm/arch-ixp4xx/irq.h
-13
View File
@@ -1,13 +0,0 @@
/*
* irq.h
*
* Copyright (C) 2002 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#define fixup_irq(irq) (irq)
include/asm-arm/arch-ixp4xx/param.h
-3
View File
@@ -1,3 +0,0 @@
/*
* linux/include/asm-arm/arch-ixp4xx/param.h
*/
include/asm-arm/arch-ixp4xx/platform.h
+27
View File
@@ -38,6 +38,33 @@ extern unsigned long ixp4xx_exp_bus_size;
#define IXP4XX_EXP_BUS_BASE(region)\
(IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size))
#define IXP4XX_EXP_BUS_END(region)\
(IXP4XX_EXP_BUS_BASE(region) + ixp4xx_exp_bus_size - 1)
/* Those macros can be used to adjust timing and configure
* other features for each region.
*/
#define IXP4XX_EXP_BUS_RECOVERY_T(x) (((x) & 0x0f) << 16)
#define IXP4XX_EXP_BUS_HOLD_T(x) (((x) & 0x03) << 20)
#define IXP4XX_EXP_BUS_STROBE_T(x) (((x) & 0x0f) << 22)
#define IXP4XX_EXP_BUS_SETUP_T(x) (((x) & 0x03) << 26)
#define IXP4XX_EXP_BUS_ADDR_T(x) (((x) & 0x03) << 28)
#define IXP4XX_EXP_BUS_SIZE(x) (((x) & 0x0f) << 10)
#define IXP4XX_EXP_BUS_CYCLES(x) (((x) & 0x03) << 14)
#define IXP4XX_EXP_BUS_CS_EN (1L << 31)
#define IXP4XX_EXP_BUS_BYTE_RD16 (1L << 6)
#define IXP4XX_EXP_BUS_HRDY_POL (1L << 5)
#define IXP4XX_EXP_BUS_MUX_EN (1L << 4)
#define IXP4XX_EXP_BUS_SPLT_EN (1L << 3)
#define IXP4XX_EXP_BUS_WR_EN (1L << 1)
#define IXP4XX_EXP_BUS_BYTE_EN (1L << 0)
#define IXP4XX_EXP_BUS_CYCLES_INTEL 0x00
#define IXP4XX_EXP_BUS_CYCLES_MOTOROLA 0x01
#define IXP4XX_EXP_BUS_CYCLES_HPI 0x02
#define IXP4XX_FLASH_WRITABLE (0x2)
#define IXP4XX_FLASH_DEFAULT (0xbcd23c40)
#define IXP4XX_FLASH_WRITE (0xbcd23c42)
include/asm-arm/arch-l7200/param.h
-19
View File
@@ -1,19 +0,0 @@
/*
* linux/include/asm-arm/arch-l7200/param.h
*
* Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net)
* Steve Hill (sjhill@cotw.com)
*
* This file contains the hardware definitions for the
* LinkUp Systems L7200 SOC development board.
*
* Changelog:
* 04-21-2000 RS Created L7200 version
* 04-25-2000 SJH Cleaned up file
* 05-03-2000 SJH Change comments and rate
*/
/*
* See 'time.h' for how the RTC HZ rate is set
*/
#define HZ 128
include/asm-arm/arch-lh7a40x/irq.h
-11
View File
@@ -1,11 +0,0 @@
/* include/asm-arm/arch-lh7a40x/irq.h
*
* Copyright (C) 2004 Logic Product Development
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
*/
void __init lh7a40x_init_board_irq (void);
include/asm-arm/arch-lh7a40x/param.h
-9
View File
@@ -1,9 +0,0 @@
/* include/asm-arm/arch-lh7a40x/param.h
*
* Copyright (C) 2004 Coastal Environmental Systems
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
*/
include/asm-arm/arch-omap/param.h
-8
View File
@@ -1,8 +0,0 @@
/*
* linux/include/asm-arm/arch-omap/param.h
*
*/
#ifdef CONFIG_OMAP_32K_TIMER_HZ
#define HZ CONFIG_OMAP_32K_TIMER_HZ
#endif
include/asm-arm/arch-pxa/debug-macro.S
+2 -15
View File
@@ -21,18 +21,5 @@
orr \rx, \rx, #0x00100000
.endm
.macro senduart,rd,rx
str \rd, [\rx, #0]
.endm
.macro busyuart,rd,rx
1002: ldr \rd, [\rx, #0x14]
tst \rd, #(1 << 6)
beq 1002b
.endm
.macro waituart,rd,rx
1001: ldr \rd, [\rx, #0x14]
tst \rd, #(1 << 5)
beq 1001b
.endm
#define UART_SHIFT 2
#include <asm/hardware/debug-8250.S>
include/asm-arm/arch-pxa/irq.h
-14
View File
@@ -1,14 +0,0 @@
/*
* linux/include/asm-arm/arch-pxa/irq.h
*
* Author: Nicolas Pitre
* Created: Jun 15, 2001
* Copyright: MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define fixup_irq(x) (x)
include/asm-arm/arch-pxa/param.h
-3
View File
@@ -1,3 +0,0 @@
/*
* linux/include/asm-arm/arch-pxa/param.h
*/
include/asm-arm/arch-realview/debug-macro.S
+1 -17
View File
@@ -11,8 +11,6 @@
*
*/
#include <linux/amba/serial.h>
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
@@ -21,18 +19,4 @@
orr \rx, \rx, #0x00009000
.endm
.macro senduart,rd,rx
strb \rd, [\rx, #UART01x_DR]
.endm
.macro waituart,rd,rx
1001: ldr \rd, [\rx, #0x18] @ UARTFLG
tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full
bne 1001b
.endm
.macro busyuart,rd,rx
1001: ldr \rd, [\rx, #0x18] @ UARTFLG
tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy
bne 1001b
.endm
#include <asm/hardware/debug-pl01x.S>
include/asm-arm/arch-realview/param.h
-19
View File
@@ -1,19 +0,0 @@
/*
* linux/include/asm-arm/arch-realview/param.h
*
* Copyright (C) 2002 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
include/asm-arm/arch-rpc/debug-macro.S
+3 -16
View File
@@ -20,19 +20,6 @@
orr \rx, \rx, #0x00000fe0
.endm
.macro senduart,rd,rx
strb \rd, [\rx]
.endm
.macro busyuart,rd,rx
1001: ldrb \rd, [\rx, #0x14]
and \rd, \rd, #0x60
teq \rd, #0x60
bne 1001b
.endm
.macro waituart,rd,rx
1001: ldrb \rd, [\rx, #0x18]
tst \rd, #0x10
beq 1001b
.endm
#define UART_SHIFT 2
#define FLOW_CONTROL
#include <asm/hardware/debug-8250.S>
include/asm-arm/arch-rpc/param.h
-3
View File
@@ -1,3 +0,0 @@
/*
* linux/include/asm-arm/arch-rpc/param.h
*/
include/asm-arm/arch-s3c2410/osiris-cpld.h
+25
View File
@@ -0,0 +1,25 @@
/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h
*
* (c) 2005 Simtec Electronics
* http://www.simtec.co.uk/products/
* Ben Dooks <ben@simtec.co.uk>
*
* OSIRIS - CPLD control constants
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_OSIRISCPLD_H
#define __ASM_ARCH_OSIRISCPLD_H
/* CTRL1 - NAND WP control */
#define OSIRIS_CTRL1_NANDSEL (0x3)
#define OSIRIS_CTRL1_BOOT_INT (1<<3)
#define OSIRIS_CTRL1_PCMCIA (1<<4)
#define OSIRIS_CTRL1_PCMCIA_nWAIT (1<<6)
#define OSIRIS_CTRL1_PCMCIA_nIOIS16 (1<<7)
#endif /* __ASM_ARCH_OSIRISCPLD_H */
include/asm-arm/arch-s3c2410/osiris-map.h
+41
View File
@@ -0,0 +1,41 @@
/* linux/include/asm-arm/arch-s3c2410/osiris-map.h
*
* (c) 2005 Simtec Electronics
* http://www.simtec.co.uk/products/
* Ben Dooks <ben@simtec.co.uk>
*
* OSIRIS - Memory map definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
*/
/* needs arch/map.h including with this */
#ifndef __ASM_ARCH_OSIRISMAP_H
#define __ASM_ARCH_OSIRISMAP_H
/* start peripherals off after the S3C2410 */
#define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x05000000))
#define OSIRIS_PA_CPLD (S3C2410_CS1 | (3<<25))
/* we put the CPLD registers next, to get them out of the way */
#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000) /* 0x01300000 */
#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD)
#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000) /* 0x01400000 */
#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<24))
#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000) /* 0x01500000 */
#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<24))
#define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000) /* 0x01600000 */
#define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<24))
#endif /* __ASM_ARCH_OSIRISMAP_H */
include/asm-arm/arch-s3c2410/param.h
-27
View File
@@ -1,27 +0,0 @@
/* linux/include/asm-arm/arch-s3c2410/param.h
*
* (c) 2003 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2410 - Machine parameters
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 02-Sep-2003 BJD Created file
* 12-Mar-2004 BJD Added include protection
*/
#ifndef __ASM_ARCH_PARAM_H
#define __ASM_ARCH_PARAM_H
/* we cannot get our timer down to 100Hz with the setup as is, but we can
* manage 200 clock ticks per second... if this is a problem, we can always
* add a software pre-scaler to the evil timer systems.
*/
#define HZ 200
#endif /* __ASM_ARCH_PARAM_H */
include/asm-arm/arch-s3c2410/regs-gpio.h
+2
View File
@@ -979,6 +979,7 @@
#define S3C2410_MISCCR_CLK0_HCLK (3<<4)
#define S3C2410_MISCCR_CLK0_PCLK (4<<4)
#define S3C2410_MISCCR_CLK0_DCLK0 (5<<4)
#define S3C2410_MISCCR_CLK0_MASK (7<<4)
#define S3C2410_MISCCR_CLK1_MPLL (0<<8)
#define S3C2410_MISCCR_CLK1_UPLL (1<<8)
@@ -986,6 +987,7 @@
#define S3C2410_MISCCR_CLK1_HCLK (3<<8)
#define S3C2410_MISCCR_CLK1_PCLK (4<<8)
#define S3C2410_MISCCR_CLK1_DCLK1 (5<<8)
#define S3C2410_MISCCR_CLK1_MASK (7<<8)
#define S3C2410_MISCCR_USBSUSPND0 (1<<12)
#define S3C2410_MISCCR_USBSUSPND1 (1<<13)
include/asm-arm/arch-sa1100/debug-macro.S
+1
View File
@@ -10,6 +10,7 @@
* published by the Free Software Foundation.
*
*/
#include <asm/hardware.h>
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
include/asm-arm/arch-sa1100/param.h
-3
View File
@@ -1,3 +0,0 @@
/*
* linux/include/asm-arm/arch-sa1100/param.h
*/
include/asm-arm/arch-shark/param.h
-5
View File
@@ -1,5 +0,0 @@
/*
* linux/include/asm-arm/arch-shark/param.h
*
* by Alexander Schulz
*/
include/asm-arm/arch-versatile/debug-macro.S
+1 -17
View File
@@ -11,8 +11,6 @@
*
*/
#include <linux/amba/serial.h>
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
@@ -22,18 +20,4 @@
orr \rx, \rx, #0x00001000
.endm
.macro senduart,rd,rx
strb \rd, [\rx, #UART01x_DR]
.endm
.macro waituart,rd,rx
1001: ldr \rd, [\rx, #0x18] @ UARTFLG
tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full
bne 1001b
.endm
.macro busyuart,rd,rx
1001: ldr \rd, [\rx, #0x18] @ UARTFLG
tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy
bne 1001b
.endm
#include <asm/hardware/debug-pl01x.S>
include/asm-arm/arch-versatile/param.h
-19
View File
@@ -1,19 +0,0 @@
/*
* linux/include/asm-arm/arch-versatile/param.h
*
* Copyright (C) 2002 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
include/asm-arm/delay.h
+7 -5
View File
@@ -6,6 +6,8 @@
#ifndef __ASM_ARM_DELAY_H
#define __ASM_ARM_DELAY_H
#include <asm/param.h> /* HZ */
extern void __delay(int loops);
/*
@@ -13,7 +15,7 @@ extern void __delay(int loops);
* it, it means that you're calling udelay() with an out of range value.
*
* With currently imposed limits, this means that we support a max delay
* of 2000us and 671 bogomips
* of 2000us. Further limits: HZ<=1000 and bogomips<=3355
*/
extern void __bad_udelay(void);
@@ -32,10 +34,10 @@ extern void __const_udelay(unsigned long);
#define MAX_UDELAY_MS 2
#define udelay(n) \
(__builtin_constant_p(n) ? \
((n) > (MAX_UDELAY_MS * 1000) ? __bad_udelay() : \
__const_udelay((n) * 0x68dbul)) : \
#define udelay(n) \
(__builtin_constant_p(n) ? \
((n) > (MAX_UDELAY_MS * 1000) ? __bad_udelay() : \
__const_udelay((n) * ((2199023U*HZ)>>11))) : \
__udelay(n))
#endif /* defined(_ARM_DELAY_H) */
include/asm-arm/hardware/debug-8250.S
+29
View File
@@ -0,0 +1,29 @@
/*
* linux/include/asm-arm/hardware/debug-8250.h
*
* Copyright (C) 1994-1999 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/serial_reg.h>
.macro senduart,rd,rx
strb \rd, [\rx, #UART_TX << UART_SHIFT]
.endm
.macro busyuart,rd,rx
1002: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
bne 1002b
.endm
.macro waituart,rd,rx
#ifdef FLOW_CONTROL
1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
beq 1001b
#endif
.endm
include/asm-arm/hardware/debug-pl01x.S
+29
View File
@@ -0,0 +1,29 @@
/* linux/include/asm-arm/arch-integrator/debug-macro.S
*
* Debugging macro include header
*
* Copyright (C) 1994-1999 Russell King
* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/amba/serial.h>
.macro senduart,rd,rx
strb \rd, [\rx, #UART01x_DR]
.endm
.macro waituart,rd,rx
1001: ldr \rd, [\rx, #UART01x_FR]
tst \rd, #UART01x_FR_TXFF
bne 1001b
.endm
.macro busyuart,rd,rx
1001: ldr \rd, [\rx, #UART01x_FR]
tst \rd, #UART01x_FR_BUSY
bne 1001b
.endm
include/asm-arm/arch-ixp2000/uengine.h → include/asm-arm/hardware/uengine.h
View File
include/asm-arm/hardware/vic.h
+1 -1
View File
@@ -39,7 +39,7 @@
#define VIC_VECT_CNTL_ENABLE (1 << 5)
#ifndef __ASSEMBLY__
void vic_init(void __iomem *base, u32 vic_sources);
void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources);
#endif
#endif
include/asm-arm/mach/arch.h
+1 -4
View File
@@ -10,19 +10,16 @@
#ifndef __ASSEMBLY__
#include <linux/compiler.h>
struct tag;
struct meminfo;
struct sys_timer;
struct machine_desc {
/*
* Note! The first five elements are used
* Note! The first four elements are used
* by assembler code in head-armv.S
*/
unsigned int nr; /* architecture number */
unsigned int __deprecated phys_ram; /* start of physical ram */
unsigned int phys_io; /* start of physical io */
unsigned int io_pg_offst; /* byte offset for io
* page tabe entry */
include/asm-arm/mach/irq.h
+4 -3
View File
@@ -61,7 +61,7 @@ struct irqdesc {
struct irqchip *chip;
struct irqaction *action;
struct list_head pend;
void *chipdata;
void __iomem *base;
void *data;
unsigned int disable_depth;
@@ -74,6 +74,7 @@ struct irqdesc {
unsigned int noautoenable : 1; /* don't automatically enable IRQ */
unsigned int unused :25;
unsigned int irqs_unhandled;
struct proc_dir_entry *procdir;
#ifdef CONFIG_SMP
@@ -113,8 +114,8 @@ void __set_irq_handler(unsigned int irq, irq_handler_t, int);
#define set_irq_handler(irq,handler) __set_irq_handler(irq,handler,0)
#define set_irq_chained_handler(irq,handler) __set_irq_handler(irq,handler,1)
#define set_irq_data(irq,d) do { irq_desc[irq].data = d; } while (0)
#define set_irq_chipdata(irq,d) do { irq_desc[irq].chipdata = d; } while (0)
#define get_irq_chipdata(irq) (irq_desc[irq].chipdata)
#define set_irq_chipdata(irq,d) do { irq_desc[irq].base = d; } while (0)
#define get_irq_chipdata(irq) (irq_desc[irq].base)
void set_irq_chip(unsigned int irq, struct irqchip *);
void set_irq_flags(unsigned int irq, unsigned int flags);
include/asm-arm/param.h
+1 -6
View File
@@ -11,12 +11,7 @@
#define __ASM_PARAM_H
#ifdef __KERNEL__
# include <asm/arch/param.h> /* for kernel version of HZ */
# ifndef HZ
# define HZ 100 /* Internal kernel timer frequency */
# endif
# define HZ CONFIG_HZ /* Internal kernel timer frequency */
# define USER_HZ 100 /* User interfaces are in "ticks" */
# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
#else