Merge tag 'timer' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull "ARM: timer cleanup work" from Arnd Bergmann:
 "These are split out from the generic soc and driver updates because
  there was a lot of conflicting work by multiple people.  Marc Zyngier
  worked on simplifying the "localtimer" interfaces, and some of the
  platforms are touching the same code as they move to device tree based
  booting.

  Signed-off-by: Arnd Bergmann <arnd@arndb.de>"

* tag 'timer' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (61 commits)
  ARM: tegra: select USB_ULPI if USB is selected
  arm/tegra: pcie: fix return value of function
  ARM: ux500: fix compilation after local timer rework
  ARM: shmobile: remove additional __io() macro use
  ARM: local timers: make the runtime registration interface mandatory
  ARM: local timers: convert MSM to runtime registration interface
  ARM: local timers: convert exynos to runtime registration interface
  ARM: smp_twd: remove old local timer interface
  ARM: imx6q: convert to twd_local_timer_register() interface
  ARM: highbank: convert to twd_local_timer_register() interface
  ARM: ux500: convert to twd_local_timer_register() interface
  ARM: shmobile: convert to twd_local_timer_register() interface
  ARM: tegra: convert to twd_local_timer_register() interface
  ARM: plat-versatile: convert to twd_local_timer_register() interface
  ARM: OMAP4: convert to twd_local_timer_register() interface
  ARM: smp_twd: add device tree support
  ARM: smp_twd: add runtime registration support
  ARM: local timers: introduce a new registration interface
  ARM: smp_twd: make local_timer_stop a symbol instead of a #define
  ARM: mach-shmobile: default to no earlytimer
  ...
This commit is contained in:
Linus Torvalds
2012-03-27 16:06:17 -07:00
103 changed files with 966 additions and 1001 deletions
+6 -6
View File
@@ -28,7 +28,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
}
static struct clk_ops sh7619_master_clk_ops = {
static struct sh_clk_ops sh7619_master_clk_ops = {
.init = master_clk_init,
};
@@ -38,7 +38,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh7619_module_clk_ops = {
static struct sh_clk_ops sh7619_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -47,22 +47,22 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
}
static struct clk_ops sh7619_bus_clk_ops = {
static struct sh_clk_ops sh7619_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
static struct clk_ops sh7619_cpu_clk_ops = {
static struct sh_clk_ops sh7619_cpu_clk_ops = {
.recalc = followparent_recalc,
};
static struct clk_ops *sh7619_clk_ops[] = {
static struct sh_clk_ops *sh7619_clk_ops[] = {
&sh7619_master_clk_ops,
&sh7619_module_clk_ops,
&sh7619_bus_clk_ops,
&sh7619_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (test_mode_pin(MODE_PIN2 | MODE_PIN0) ||
test_mode_pin(MODE_PIN2 | MODE_PIN1))
+6 -6
View File
@@ -30,7 +30,7 @@ static void master_clk_init(struct clk *clk)
pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
}
static struct clk_ops sh7201_master_clk_ops = {
static struct sh_clk_ops sh7201_master_clk_ops = {
.init = master_clk_init,
};
@@ -40,7 +40,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh7201_module_clk_ops = {
static struct sh_clk_ops sh7201_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -50,7 +50,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh7201_bus_clk_ops = {
static struct sh_clk_ops sh7201_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
@@ -60,18 +60,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
return clk->parent->rate / ifc_divisors[idx];
}
static struct clk_ops sh7201_cpu_clk_ops = {
static struct sh_clk_ops sh7201_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh7201_clk_ops[] = {
static struct sh_clk_ops *sh7201_clk_ops[] = {
&sh7201_master_clk_ops,
&sh7201_module_clk_ops,
&sh7201_bus_clk_ops,
&sh7201_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (test_mode_pin(MODE_PIN1 | MODE_PIN0))
pll2_mult = 1;
+6 -6
View File
@@ -32,7 +32,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult;
}
static struct clk_ops sh7203_master_clk_ops = {
static struct sh_clk_ops sh7203_master_clk_ops = {
.init = master_clk_init,
};
@@ -42,7 +42,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh7203_module_clk_ops = {
static struct sh_clk_ops sh7203_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -52,22 +52,22 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx-2];
}
static struct clk_ops sh7203_bus_clk_ops = {
static struct sh_clk_ops sh7203_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
static struct clk_ops sh7203_cpu_clk_ops = {
static struct sh_clk_ops sh7203_cpu_clk_ops = {
.recalc = followparent_recalc,
};
static struct clk_ops *sh7203_clk_ops[] = {
static struct sh_clk_ops *sh7203_clk_ops[] = {
&sh7203_master_clk_ops,
&sh7203_module_clk_ops,
&sh7203_bus_clk_ops,
&sh7203_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (test_mode_pin(MODE_PIN1))
pll2_mult = 4;
+6 -6
View File
@@ -29,7 +29,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
}
static struct clk_ops sh7206_master_clk_ops = {
static struct sh_clk_ops sh7206_master_clk_ops = {
.init = master_clk_init,
};
@@ -39,7 +39,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh7206_module_clk_ops = {
static struct sh_clk_ops sh7206_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -48,7 +48,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
}
static struct clk_ops sh7206_bus_clk_ops = {
static struct sh_clk_ops sh7206_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
@@ -58,18 +58,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
return clk->parent->rate / ifc_divisors[idx];
}
static struct clk_ops sh7206_cpu_clk_ops = {
static struct sh_clk_ops sh7206_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh7206_clk_ops[] = {
static struct sh_clk_ops *sh7206_clk_ops[] = {
&sh7206_master_clk_ops,
&sh7206_module_clk_ops,
&sh7206_bus_clk_ops,
&sh7206_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (test_mode_pin(MODE_PIN2 | MODE_PIN1 | MODE_PIN0))
pll2_mult = 1;
+6 -6
View File
@@ -34,7 +34,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= pfc_divisors[idx];
}
static struct clk_ops sh3_master_clk_ops = {
static struct sh_clk_ops sh3_master_clk_ops = {
.init = master_clk_init,
};
@@ -46,7 +46,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh3_module_clk_ops = {
static struct sh_clk_ops sh3_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -58,7 +58,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / stc_multipliers[idx];
}
static struct clk_ops sh3_bus_clk_ops = {
static struct sh_clk_ops sh3_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
@@ -70,18 +70,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
return clk->parent->rate / ifc_divisors[idx];
}
static struct clk_ops sh3_cpu_clk_ops = {
static struct sh_clk_ops sh3_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh3_clk_ops[] = {
static struct sh_clk_ops *sh3_clk_ops[] = {
&sh3_master_clk_ops,
&sh3_module_clk_ops,
&sh3_bus_clk_ops,
&sh3_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh3_clk_ops))
*ops = sh3_clk_ops[idx];
+6 -6
View File
@@ -35,7 +35,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
}
static struct clk_ops sh7705_master_clk_ops = {
static struct sh_clk_ops sh7705_master_clk_ops = {
.init = master_clk_init,
};
@@ -45,7 +45,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh7705_module_clk_ops = {
static struct sh_clk_ops sh7705_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -55,7 +55,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / stc_multipliers[idx];
}
static struct clk_ops sh7705_bus_clk_ops = {
static struct sh_clk_ops sh7705_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
@@ -65,18 +65,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
return clk->parent->rate / ifc_divisors[idx];
}
static struct clk_ops sh7705_cpu_clk_ops = {
static struct sh_clk_ops sh7705_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh7705_clk_ops[] = {
static struct sh_clk_ops *sh7705_clk_ops[] = {
&sh7705_master_clk_ops,
&sh7705_module_clk_ops,
&sh7705_bus_clk_ops,
&sh7705_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh7705_clk_ops))
*ops = sh7705_clk_ops[idx];
+6 -6
View File
@@ -30,7 +30,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= pfc_divisors[idx];
}
static struct clk_ops sh7706_master_clk_ops = {
static struct sh_clk_ops sh7706_master_clk_ops = {
.init = master_clk_init,
};
@@ -42,7 +42,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh7706_module_clk_ops = {
static struct sh_clk_ops sh7706_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -54,7 +54,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / stc_multipliers[idx];
}
static struct clk_ops sh7706_bus_clk_ops = {
static struct sh_clk_ops sh7706_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
@@ -66,18 +66,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
return clk->parent->rate / ifc_divisors[idx];
}
static struct clk_ops sh7706_cpu_clk_ops = {
static struct sh_clk_ops sh7706_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh7706_clk_ops[] = {
static struct sh_clk_ops *sh7706_clk_ops[] = {
&sh7706_master_clk_ops,
&sh7706_module_clk_ops,
&sh7706_bus_clk_ops,
&sh7706_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh7706_clk_ops))
*ops = sh7706_clk_ops[idx];
+6 -6
View File
@@ -30,7 +30,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= pfc_divisors[idx];
}
static struct clk_ops sh7709_master_clk_ops = {
static struct sh_clk_ops sh7709_master_clk_ops = {
.init = master_clk_init,
};
@@ -42,7 +42,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh7709_module_clk_ops = {
static struct sh_clk_ops sh7709_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -55,7 +55,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate * stc_multipliers[idx];
}
static struct clk_ops sh7709_bus_clk_ops = {
static struct sh_clk_ops sh7709_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
@@ -67,18 +67,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
return clk->parent->rate / ifc_divisors[idx];
}
static struct clk_ops sh7709_cpu_clk_ops = {
static struct sh_clk_ops sh7709_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh7709_clk_ops[] = {
static struct sh_clk_ops *sh7709_clk_ops[] = {
&sh7709_master_clk_ops,
&sh7709_module_clk_ops,
&sh7709_bus_clk_ops,
&sh7709_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh7709_clk_ops))
*ops = sh7709_clk_ops[idx];
+6 -6
View File
@@ -29,7 +29,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];
}
static struct clk_ops sh7710_master_clk_ops = {
static struct sh_clk_ops sh7710_master_clk_ops = {
.init = master_clk_init,
};
@@ -39,7 +39,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / md_table[idx];
}
static struct clk_ops sh7710_module_clk_ops = {
static struct sh_clk_ops sh7710_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -49,7 +49,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / md_table[idx];
}
static struct clk_ops sh7710_bus_clk_ops = {
static struct sh_clk_ops sh7710_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
@@ -59,18 +59,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
return clk->parent->rate / md_table[idx];
}
static struct clk_ops sh7710_cpu_clk_ops = {
static struct sh_clk_ops sh7710_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh7710_clk_ops[] = {
static struct sh_clk_ops *sh7710_clk_ops[] = {
&sh7710_master_clk_ops,
&sh7710_module_clk_ops,
&sh7710_bus_clk_ops,
&sh7710_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh7710_clk_ops))
*ops = sh7710_clk_ops[idx];
+5 -5
View File
@@ -29,7 +29,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= multipliers[idx];
}
static struct clk_ops sh7712_master_clk_ops = {
static struct sh_clk_ops sh7712_master_clk_ops = {
.init = master_clk_init,
};
@@ -41,7 +41,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / divisors[idx];
}
static struct clk_ops sh7712_module_clk_ops = {
static struct sh_clk_ops sh7712_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -53,17 +53,17 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
return clk->parent->rate / divisors[idx];
}
static struct clk_ops sh7712_cpu_clk_ops = {
static struct sh_clk_ops sh7712_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh7712_clk_ops[] = {
static struct sh_clk_ops *sh7712_clk_ops[] = {
&sh7712_master_clk_ops,
&sh7712_module_clk_ops,
&sh7712_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh7712_clk_ops))
*ops = sh7712_clk_ops[idx];
+3 -3
View File
@@ -41,7 +41,7 @@ static inline int frqcr3_lookup(struct clk *clk, unsigned long rate)
return 5;
}
static struct clk_ops sh4202_emi_clk_ops = {
static struct sh_clk_ops sh4202_emi_clk_ops = {
.recalc = emi_clk_recalc,
};
@@ -56,7 +56,7 @@ static unsigned long femi_clk_recalc(struct clk *clk)
return clk->parent->rate / frqcr3_divisors[idx];
}
static struct clk_ops sh4202_femi_clk_ops = {
static struct sh_clk_ops sh4202_femi_clk_ops = {
.recalc = femi_clk_recalc,
};
@@ -130,7 +130,7 @@ static int shoc_clk_set_rate(struct clk *clk, unsigned long rate)
return 0;
}
static struct clk_ops sh4202_shoc_clk_ops = {
static struct sh_clk_ops sh4202_shoc_clk_ops = {
.init = shoc_clk_init,
.recalc = shoc_clk_recalc,
.set_rate = shoc_clk_set_rate,
+6 -6
View File
@@ -31,7 +31,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007];
}
static struct clk_ops sh4_master_clk_ops = {
static struct sh_clk_ops sh4_master_clk_ops = {
.init = master_clk_init,
};
@@ -41,7 +41,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh4_module_clk_ops = {
static struct sh_clk_ops sh4_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -51,7 +51,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / bfc_divisors[idx];
}
static struct clk_ops sh4_bus_clk_ops = {
static struct sh_clk_ops sh4_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
@@ -61,18 +61,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
return clk->parent->rate / ifc_divisors[idx];
}
static struct clk_ops sh4_cpu_clk_ops = {
static struct sh_clk_ops sh4_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh4_clk_ops[] = {
static struct sh_clk_ops *sh4_clk_ops[] = {
&sh4_master_clk_ops,
&sh4_module_clk_ops,
&sh4_bus_clk_ops,
&sh4_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh4_clk_ops))
*ops = sh4_clk_ops[idx];
+2 -2
View File
@@ -61,7 +61,7 @@ static unsigned long dll_recalc(struct clk *clk)
return clk->parent->rate * mult;
}
static struct clk_ops dll_clk_ops = {
static struct sh_clk_ops dll_clk_ops = {
.recalc = dll_recalc,
};
@@ -81,7 +81,7 @@ static unsigned long pll_recalc(struct clk *clk)
return clk->parent->rate * mult;
}
static struct clk_ops pll_clk_ops = {
static struct sh_clk_ops pll_clk_ops = {
.recalc = pll_recalc,
};
+2 -2
View File
@@ -61,7 +61,7 @@ static unsigned long dll_recalc(struct clk *clk)
return clk->parent->rate * mult;
}
static struct clk_ops dll_clk_ops = {
static struct sh_clk_ops dll_clk_ops = {
.recalc = dll_recalc,
};
@@ -84,7 +84,7 @@ static unsigned long pll_recalc(struct clk *clk)
return (clk->parent->rate * mult) / div;
}
static struct clk_ops pll_clk_ops = {
static struct sh_clk_ops pll_clk_ops = {
.recalc = pll_recalc,
};
+2 -2
View File
@@ -64,7 +64,7 @@ static unsigned long dll_recalc(struct clk *clk)
return clk->parent->rate * mult;
}
static struct clk_ops dll_clk_ops = {
static struct sh_clk_ops dll_clk_ops = {
.recalc = dll_recalc,
};
@@ -87,7 +87,7 @@ static unsigned long pll_recalc(struct clk *clk)
return (clk->parent->rate * mult) / div;
}
static struct clk_ops pll_clk_ops = {
static struct sh_clk_ops pll_clk_ops = {
.recalc = pll_recalc,
};
+2 -2
View File
@@ -65,7 +65,7 @@ static unsigned long dll_recalc(struct clk *clk)
return clk->parent->rate * mult;
}
static struct clk_ops dll_clk_ops = {
static struct sh_clk_ops dll_clk_ops = {
.recalc = dll_recalc,
};
@@ -88,7 +88,7 @@ static unsigned long pll_recalc(struct clk *clk)
return (clk->parent->rate * mult) / div;
}
static struct clk_ops pll_clk_ops = {
static struct sh_clk_ops pll_clk_ops = {
.recalc = pll_recalc,
};
+3 -3
View File
@@ -70,7 +70,7 @@ static unsigned long fll_recalc(struct clk *clk)
return (clk->parent->rate * mult) / div;
}
static struct clk_ops fll_clk_ops = {
static struct sh_clk_ops fll_clk_ops = {
.recalc = fll_recalc,
};
@@ -90,7 +90,7 @@ static unsigned long pll_recalc(struct clk *clk)
return clk->parent->rate * mult;
}
static struct clk_ops pll_clk_ops = {
static struct sh_clk_ops pll_clk_ops = {
.recalc = pll_recalc,
};
@@ -105,7 +105,7 @@ static unsigned long div3_recalc(struct clk *clk)
return clk->parent->rate / 3;
}
static struct clk_ops div3_clk_ops = {
static struct sh_clk_ops div3_clk_ops = {
.recalc = div3_recalc,
};
+1 -1
View File
@@ -33,7 +33,7 @@ static unsigned long pll_recalc(struct clk *clk)
return clk->parent->rate * multiplier;
}
static struct clk_ops pll_clk_ops = {
static struct sh_clk_ops pll_clk_ops = {
.recalc = pll_recalc,
};
+7 -7
View File
@@ -27,7 +27,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= p0fc_divisors[(__raw_readl(FRQCR) >> 4) & 0x07];
}
static struct clk_ops sh7763_master_clk_ops = {
static struct sh_clk_ops sh7763_master_clk_ops = {
.init = master_clk_init,
};
@@ -37,7 +37,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / p0fc_divisors[idx];
}
static struct clk_ops sh7763_module_clk_ops = {
static struct sh_clk_ops sh7763_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -47,22 +47,22 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / bfc_divisors[idx];
}
static struct clk_ops sh7763_bus_clk_ops = {
static struct sh_clk_ops sh7763_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
static struct clk_ops sh7763_cpu_clk_ops = {
static struct sh_clk_ops sh7763_cpu_clk_ops = {
.recalc = followparent_recalc,
};
static struct clk_ops *sh7763_clk_ops[] = {
static struct sh_clk_ops *sh7763_clk_ops[] = {
&sh7763_master_clk_ops,
&sh7763_module_clk_ops,
&sh7763_bus_clk_ops,
&sh7763_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh7763_clk_ops))
*ops = sh7763_clk_ops[idx];
@@ -74,7 +74,7 @@ static unsigned long shyway_clk_recalc(struct clk *clk)
return clk->parent->rate / cfc_divisors[idx];
}
static struct clk_ops sh7763_shyway_clk_ops = {
static struct sh_clk_ops sh7763_shyway_clk_ops = {
.recalc = shyway_clk_recalc,
};
+6 -6
View File
@@ -24,7 +24,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f];
}
static struct clk_ops sh7770_master_clk_ops = {
static struct sh_clk_ops sh7770_master_clk_ops = {
.init = master_clk_init,
};
@@ -34,7 +34,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh7770_module_clk_ops = {
static struct sh_clk_ops sh7770_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -44,7 +44,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / bfc_divisors[idx];
}
static struct clk_ops sh7770_bus_clk_ops = {
static struct sh_clk_ops sh7770_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
@@ -54,18 +54,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
return clk->parent->rate / ifc_divisors[idx];
}
static struct clk_ops sh7770_cpu_clk_ops = {
static struct sh_clk_ops sh7770_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh7770_clk_ops[] = {
static struct sh_clk_ops *sh7770_clk_ops[] = {
&sh7770_master_clk_ops,
&sh7770_module_clk_ops,
&sh7770_bus_clk_ops,
&sh7770_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh7770_clk_ops))
*ops = sh7770_clk_ops[idx];
+7 -7
View File
@@ -27,7 +27,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= pfc_divisors[__raw_readl(FRQCR) & 0x0003];
}
static struct clk_ops sh7780_master_clk_ops = {
static struct sh_clk_ops sh7780_master_clk_ops = {
.init = master_clk_init,
};
@@ -37,7 +37,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh7780_module_clk_ops = {
static struct sh_clk_ops sh7780_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -47,7 +47,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / bfc_divisors[idx];
}
static struct clk_ops sh7780_bus_clk_ops = {
static struct sh_clk_ops sh7780_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
@@ -57,18 +57,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
return clk->parent->rate / ifc_divisors[idx];
}
static struct clk_ops sh7780_cpu_clk_ops = {
static struct sh_clk_ops sh7780_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh7780_clk_ops[] = {
static struct sh_clk_ops *sh7780_clk_ops[] = {
&sh7780_master_clk_ops,
&sh7780_module_clk_ops,
&sh7780_bus_clk_ops,
&sh7780_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh7780_clk_ops))
*ops = sh7780_clk_ops[idx];
@@ -80,7 +80,7 @@ static unsigned long shyway_clk_recalc(struct clk *clk)
return clk->parent->rate / cfc_divisors[idx];
}
static struct clk_ops sh7780_shyway_clk_ops = {
static struct sh_clk_ops sh7780_shyway_clk_ops = {
.recalc = shyway_clk_recalc,
};
+1 -1
View File
@@ -36,7 +36,7 @@ static unsigned long pll_recalc(struct clk *clk)
return clk->parent->rate * multiplier;
}
static struct clk_ops pll_clk_ops = {
static struct sh_clk_ops pll_clk_ops = {
.recalc = pll_recalc,
};
+1 -1
View File
@@ -38,7 +38,7 @@ static unsigned long pll_recalc(struct clk *clk)
return clk->parent->rate * multiplier;
}
static struct clk_ops pll_clk_ops = {
static struct sh_clk_ops pll_clk_ops = {
.recalc = pll_recalc,
};
+1 -1
View File
@@ -32,7 +32,7 @@ static unsigned long pll_recalc(struct clk *clk)
return clk->parent->rate * 72;
}
static struct clk_ops pll_clk_ops = {
static struct sh_clk_ops pll_clk_ops = {
.recalc = pll_recalc,
};
+6 -6
View File
@@ -28,7 +28,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= ifc_table[idx];
}
static struct clk_ops sh5_master_clk_ops = {
static struct sh_clk_ops sh5_master_clk_ops = {
.init = master_clk_init,
};
@@ -38,7 +38,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
return clk->parent->rate / ifc_table[idx];
}
static struct clk_ops sh5_module_clk_ops = {
static struct sh_clk_ops sh5_module_clk_ops = {
.recalc = module_clk_recalc,
};
@@ -48,7 +48,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
return clk->parent->rate / ifc_table[idx];
}
static struct clk_ops sh5_bus_clk_ops = {
static struct sh_clk_ops sh5_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
@@ -58,18 +58,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
return clk->parent->rate / ifc_table[idx];
}
static struct clk_ops sh5_cpu_clk_ops = {
static struct sh_clk_ops sh5_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh5_clk_ops[] = {
static struct sh_clk_ops *sh5_clk_ops[] = {
&sh5_master_clk_ops,
&sh5_module_clk_ops,
&sh5_bus_clk_ops,
&sh5_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
cprc_base = (unsigned long)ioremap_nocache(CPRC_BASE, 1024);
BUG_ON(!cprc_base);