Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: m68knommu: put ColdFire head code into .text.head section m68knommu: remove last use of CONFIG_FADS and CONFIG_RPXCLASSIC m68knommu: remove RPXCLASSIC from the m68k tree m68knommu: fec: remove FADS m68knommu: MCF5307 PIT GENERIC_CLOCKEVENTS support m68knommu: add read_barrier_depends() and irqs_disabled_flags() m68knommu: add byteswap assembly opcode for ISA A+ m68knommu: add ffs and __ffs plattform which support ISA A+ or ISA C m68knommu: add sched_clock() for the DMA timer m68knommu: complete generic time m68knommu: move code within time.c m68knommu: m68knommu: add old stack trace method m68knommu: Add Coldfire DMA Timer support m68knommu: defconfig for M5407C3 board m68knommu: defconfig for M5307C3 board m68knommu: defconfig for M5275EVB board m68knommu: defconfig for M5249EVB board m68knommu: change to a configs directory for board configurations
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@@ -14,8 +14,38 @@
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#error only <linux/bitops.h> can be included directly
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#endif
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#if defined (__mcfisaaplus__) || defined (__mcfisac__)
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static inline int ffs(unsigned int val)
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{
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if (!val)
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return 0;
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asm volatile(
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"bitrev %0\n\t"
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"ff1 %0\n\t"
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: "=d" (val)
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: "0" (val)
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);
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val++;
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return val;
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}
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static inline int __ffs(unsigned int val)
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{
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asm volatile(
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"bitrev %0\n\t"
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"ff1 %0\n\t"
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: "=d" (val)
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: "0" (val)
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);
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return val;
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}
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#else
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#include <asm-generic/bitops/ffs.h>
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#include <asm-generic/bitops/__ffs.h>
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#endif
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#include <asm-generic/bitops/sched.h>
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#include <asm-generic/bitops/ffz.h>
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@@ -1,13 +1,27 @@
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#ifndef _M68KNOMMU_BYTEORDER_H
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#define _M68KNOMMU_BYTEORDER_H
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#include <asm/types.h>
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#include <linux/types.h>
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#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
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# define __BYTEORDER_HAS_U64__
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# define __SWAB_64_THRU_32__
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#endif
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#if defined (__mcfisaaplus__) || defined (__mcfisac__)
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static inline __attribute_const__ __u32 ___arch__swab32(__u32 val)
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{
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asm(
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"byterev %0"
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: "=d" (val)
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: "0" (val)
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);
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return val;
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}
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#define __arch__swab32(x) ___arch__swab32(x)
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#endif
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#include <linux/byteorder/big_endian.h>
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#endif /* _M68KNOMMU_BYTEORDER_H */
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@@ -519,25 +519,6 @@ typedef struct scc_enet {
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#define SICR_ENET_CLKRT ((uint)0x00002c00)
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#endif
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#ifdef CONFIG_RPXCLASSIC
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/* Bits in parallel I/O port registers that have to be set/cleared
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* to configure the pins for SCC1 use.
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*/
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#define PA_ENET_RXD ((ushort)0x0001)
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#define PA_ENET_TXD ((ushort)0x0002)
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#define PA_ENET_TCLK ((ushort)0x0200)
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#define PA_ENET_RCLK ((ushort)0x0800)
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#define PB_ENET_TENA ((uint)0x00001000)
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#define PC_ENET_CLSN ((ushort)0x0010)
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#define PC_ENET_RENA ((ushort)0x0020)
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/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to
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* SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
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*/
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#define SICR_ENET_MASK ((uint)0x000000ff)
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#define SICR_ENET_CLKRT ((uint)0x0000003d)
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#endif
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/* SCC Event register as used by Ethernet.
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*/
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#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */
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@@ -118,6 +118,8 @@ asmlinkage void resume(void);
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#define smp_read_barrier_depends() do { } while(0)
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#endif
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#define read_barrier_depends() ((void)0)
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#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
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struct __xchg_dummy { unsigned long a[100]; };
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@@ -310,4 +312,13 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
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#endif
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#define arch_align_stack(x) (x)
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static inline int irqs_disabled_flags(unsigned long flags)
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{
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if (flags & 0x0700)
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return 0;
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else
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return 1;
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}
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#endif /* _M68KNOMMU_SYSTEM_H */
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