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sh: Add SH7720 CPU support.

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This adds support for the SH7720 (SH3-DSP) CPU.

Signed-off by: Markus Brunner <super.firetwister@gmail.com>
Signed-off by: Mark Jonas <toertel@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Markus Brunner
2007-08-20 08:59:33 +09:00
committed by Paul Mundt
parent dfc5ed2a93
commit 3ea6bc3de4
18 changed files with 359 additions and 27 deletions
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include/asm-sh/cpu-sh3/cache.h
+3 -1
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@@ -26,7 +26,9 @@
#define CCR_CACHE_ENABLE CCR_CACHE_CE
#define CCR_CACHE_INVALIDATE CCR_CACHE_CF
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7710)
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7710) || \
defined(CONFIG_CPU_SUBTYPE_SH7720)
#define CCR3 0xa40000b4
#define CCR_CACHE_16KB 0x00010000
#define CCR_CACHE_32KB 0x00020000
include/asm-sh/cpu-sh3/dma.h
+13
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@@ -1,7 +1,20 @@
#ifndef __ASM_CPU_SH3_DMA_H
#define __ASM_CPU_SH3_DMA_H
#if defined(CONFIG_CPU_SUBTYPE_SH7720)
#define SH_DMAC_BASE 0xa4010020
#define DMTE0_IRQ 48
#define DMTE1_IRQ 49
#define DMTE2_IRQ 50
#define DMTE3_IRQ 51
#define DMTE4_IRQ 76
#define DMTE5_IRQ 77
#else
#define SH_DMAC_BASE 0xa4000020
#endif
/* Definitions for the SuperH DMAC */
#define TM_BURST 0x00000020
include/asm-sh/cpu-sh3/mmu_context.h
+5 -4
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@@ -27,12 +27,13 @@
#define TRA 0xffffffd0
#define EXPEVT 0xffffffd4
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
defined(CONFIG_CPU_SUBTYPE_SH7709) || \
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7706) || \
defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7707) || \
defined(CONFIG_CPU_SUBTYPE_SH7709) || \
defined(CONFIG_CPU_SUBTYPE_SH7710) || \
defined(CONFIG_CPU_SUBTYPE_SH7712) || \
defined(CONFIG_CPU_SUBTYPE_SH7710)
defined(CONFIG_CPU_SUBTYPE_SH7720)
#define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */
#else
#define INTEVT 0xffffffd8
include/asm-sh/cpu-sh3/timer.h
+6 -3
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@@ -23,11 +23,13 @@
* ---------------------------------------------------------------------------
*/
#if !defined(CONFIG_CPU_SUBTYPE_SH7727)
#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && \
!defined(CONFIG_CPU_SUBTYPE_SH7727)
#define TMU_TOCR 0xfffffe90 /* Byte access */
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7710)
#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \
defined(CONFIG_CPU_SUBTYPE_SH7720)
#define TMU_012_TSTR 0xa412fe92 /* Byte access */
#define TMU0_TCOR 0xa412fe94 /* Long access */
@@ -56,7 +58,8 @@
#define TMU2_TCOR 0xfffffeac /* Long access */
#define TMU2_TCNT 0xfffffeb0 /* Long access */
#define TMU2_TCR 0xfffffeb4 /* Word access */
#if !defined(CONFIG_CPU_SUBTYPE_SH7727)
#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && \
!defined(CONFIG_CPU_SUBTYPE_SH7727)
#define TMU2_TCPR2 0xfffffeb8 /* Long access */
#endif
#endif
include/asm-sh/cpu-sh3/ubc.h
+2 -1
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@@ -11,7 +11,8 @@
#ifndef __ASM_CPU_SH3_UBC_H
#define __ASM_CPU_SH3_UBC_H
#if defined(CONFIG_CPU_SUBTYPE_SH7710)
#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \
defined(CONFIG_CPU_SUBTYPE_SH7720)
#define UBC_BARA 0xa4ffffb0
#define UBC_BAMRA 0xa4ffffb4
#define UBC_BBRA 0xa4ffffb8
include/asm-sh/processor.h
+1 -1
View File
@@ -45,7 +45,7 @@ enum cpu_type {
CPU_SH7705, CPU_SH7706, CPU_SH7707,
CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
CPU_SH7729,
CPU_SH7720, CPU_SH7729,
/* SH-4 types */
CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,