Merge Zaurus branch

This commit is contained in:
Russell King
2006-06-20 19:49:07 +01:00
committed by Russell King
16 changed files with 312 additions and 69 deletions
+4
View File
@@ -31,6 +31,7 @@
#define POODLE_GPIO_CF_CD (14)
#define POODLE_GPIO_CF_STSCHG (14)
#define POODLE_GPIO_SD_PWR (33)
#define POODLE_GPIO_SD_PWR1 (3)
#define POODLE_GPIO_nSD_CLK (6)
#define POODLE_GPIO_nSD_WP (7)
#define POODLE_GPIO_nSD_INT (8)
@@ -42,6 +43,7 @@
#define POODLE_GPIO_BYPASS_ON (36)
#define POODLE_GPIO_CHRG_ON (38)
#define POODLE_GPIO_CHRG_FULL (16)
#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */
/* PXA GPIOs */
#define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO(0)
@@ -68,4 +70,6 @@
#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
#define POODLE_SCOOP_IO_OUT ( 0 )
extern struct platform_device poodle_locomo_device;
#endif /* __ASM_ARCH_POODLE_H */
+1
View File
@@ -10,6 +10,7 @@
* published by the Free Software Foundation.
*/
#include <asm/proc-fns.h>
#include "hardware.h"
#include "pxa-regs.h"
+11
View File
@@ -16,6 +16,7 @@ struct sharpsl_charger_machinfo {
void (*exit)(void);
int gpio_acin;
int gpio_batfull;
int batfull_irq;
int gpio_batlock;
int gpio_fatal;
void (*discharge)(int);
@@ -34,9 +35,19 @@ struct sharpsl_charger_machinfo {
#define SHARPSL_STATUS_FATAL 7
unsigned long (*charger_wakeup)(void);
int (*should_wakeup)(unsigned int resume_on_alarm);
void (*backlight_limit)(int);
int (*backlight_get_status) (void);
int charge_on_volt;
int charge_on_temp;
int charge_acin_high;
int charge_acin_low;
int fatal_acin_volt;
int fatal_noacin_volt;
int bat_levels;
struct battery_thresh *bat_levels_noac;
struct battery_thresh *bat_levels_acin;
struct battery_thresh *bat_levels_noac_bl;
struct battery_thresh *bat_levels_acin_bl;
int status_high_acin;
int status_low_acin;
int status_high_noac;
+3
View File
@@ -108,6 +108,9 @@ extern void __show_regs(struct pt_regs *);
extern int cpu_architecture(void);
extern void cpu_init(void);
void arm_machine_restart(char mode);
extern void (*arm_pm_restart)(char str);
/*
* Intel's XScale3 core supports some v6 features (supersections, L2)
* but advertises itself as v5 as it does not support the v6 ISA. For