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Merge master.kernel.org:/home/rmk/linux-2.6-arm

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* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 3473/1: Use numbers 0-15 for the VFP double registers
  [ARM] 3472/1: Use the D variants of FLDMIA/FSTMIA on ARMv6
  [ARM] 3471/1: FTOSI functions should return 0 for NaN
  [ARM] 3470/1: Clear the HWCAP bits for the disabled kernel features
  [ARM] 3469/1: S3C24XX: clkout missing hclk selector
  [ARM] 3468/1: S3C2410: SMDK common include fix
  [ARM] 3461/1: ARM: OMAP: Fix clk_get() when using id and name
  [ARM] 3460/1: ARM: OMAP: Remove unnecessary nop_release()
  [ARM] 3459/1: ixp23xx: fix debug serial macros for big-endian operation
  [ARM] Allow decompressor to be built with -ffunction-sections
  [ARM] Fix SA110/SA1100 cache flushing
  [ARM] ebsa110: Fix incorrect serial port address
  [ARM] Fix ebsa110 debug macros
  [ARM] Move FLUSH_BASE macros to asm/arch/memory.h
  [ARM] Remove unnecessary extra parens in include/asm-arm/memory.h
  [ARM] arm's arch_local_page_offset() fix against 2.6.17-rc1
This commit is contained in:
Linus Torvalds
2006-04-10 16:45:24 -07:00
parent e38d557896 1356c1948d
commit 30d41bfbfb
35 changed files with 140 additions and 161 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/asm-arm/arch-cl7500/hardware.h
-4
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@@ -53,16 +53,12 @@
#define SCREEN_END 0xdfc00000
#define SCREEN_BASE 0xdf800000
#define FLUSH_BASE 0xdf000000
#define VIDC_BASE (void __iomem *)0xe0400000
#define IOMD_BASE IOMEM(0xe0200000)
#define IOC_BASE IOMEM(0xe0200000)
#define FLOPPYDMA_BASE IOMEM(0xe002a000)
#define PCIO_BASE IOMEM(0xe0010000)
#define FLUSH_BASE_PHYS 0x00000000 /* ROM */
#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
/* in/out bias for the ISA slot region */
include/asm-arm/arch-cl7500/memory.h
+6
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@@ -26,4 +26,10 @@
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
/*
* Cache flushing area - ROM
*/
#define FLUSH_BASE_PHYS 0x00000000
#define FLUSH_BASE 0xdf000000
#endif
include/asm-arm/arch-ebsa110/debug-macro.S
+1 -1
View File
@@ -18,4 +18,4 @@
#define UART_SHIFT 2
#define FLOW_CONTROL
#include <asm/hardware/debug-8250.h>
#include <asm/hardware/debug-8250.S>
include/asm-arm/arch-ebsa110/hardware.h
-3
View File
@@ -57,9 +57,6 @@
/*
* RAM definitions
*/
#define FLUSH_BASE_PHYS 0x40000000
#define FLUSH_BASE 0xdf000000
#define UNCACHEABLE_ADDR 0xff000000 /* IRQ_STAT */
#endif
include/asm-arm/arch-ebsa110/memory.h
+6
View File
@@ -28,4 +28,10 @@
#define __virt_to_bus(x) (x)
#define __bus_to_virt(x) (x)
/*
* Cache flushing area - SRAM
*/
#define FLUSH_BASE_PHYS 0x40000000
#define FLUSH_BASE 0xdf000000
#endif
include/asm-arm/arch-ebsa110/uncompress.h
+1 -1
View File
@@ -10,7 +10,7 @@
#include <linux/serial_reg.h>
#define SERIAL_BASE ((unsigned char *)0xfe000be0)
#define SERIAL_BASE ((unsigned char *)0xf0000be0)
/*
* This does not append a newline
include/asm-arm/arch-ebsa285/hardware.h
-7
View File
@@ -48,9 +48,6 @@
#define PCICFG0_SIZE 0x01000000
#define PCICFG0_BASE 0xfa000000
#define FLUSH_SIZE 0x00100000
#define FLUSH_BASE 0xf9000000
#define PCIMEM_SIZE 0x01000000
#define PCIMEM_BASE 0xf0000000
@@ -61,9 +58,6 @@
#define PCIMEM_SIZE 0x80000000
#define PCIMEM_BASE 0x80000000
#define FLUSH_SIZE 0x00100000
#define FLUSH_BASE 0x7e000000
#define WFLUSH_SIZE 0x01000000
#define WFLUSH_BASE 0x7d000000
@@ -94,7 +88,6 @@
#define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5))
#define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6))
#define FLUSH_BASE_PHYS 0x50000000
#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108)
include/asm-arm/arch-ebsa285/memory.h
+12
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@@ -49,12 +49,22 @@ extern unsigned long __bus_to_virt(unsigned long);
#define TASK_SIZE UL(0xbf000000)
#define PAGE_OFFSET UL(0xc0000000)
/*
* Cache flushing area.
*/
#define FLUSH_BASE 0xf9000000
#elif defined(CONFIG_ARCH_CO285)
/* Task size and page offset at 1.5GB */
#define TASK_SIZE UL(0x5f000000)
#define PAGE_OFFSET UL(0x60000000)
/*
* Cache flushing area.
*/
#define FLUSH_BASE 0x7e000000
#else
#error "Undefined footbridge architecture"
@@ -72,4 +82,6 @@ extern unsigned long __bus_to_virt(unsigned long);
*/
#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
#define FLUSH_BASE_PHYS 0x50000000
#endif
include/asm-arm/arch-ixp23xx/debug-macro.S
+3
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@@ -17,6 +17,9 @@
tst \rx, #1 @ mmu enabled?
ldreq \rx, =IXP23XX_PERIPHERAL_PHYS @ physical
ldrne \rx, =IXP23XX_PERIPHERAL_VIRT @ virtual
#ifdef __ARMEB__
orr \rx, \rx, #0x00000003
#endif
.endm
#define UART_SHIFT 2
include/asm-arm/arch-l7200/hardware.h
-3
View File
@@ -52,9 +52,6 @@
#define ISA_SIZE 0x20000000
#define ISA_BASE 0xe0000000
#define FLUSH_BASE_PHYS 0x40000000 /* ROM */
#define FLUSH_BASE 0xdf000000
#define PCIO_BASE IO_BASE
#endif
include/asm-arm/arch-l7200/memory.h
+6
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@@ -20,4 +20,10 @@
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
/*
* Cache flushing area - ROM
*/
#define FLUSH_BASE_PHYS 0x40000000
#define FLUSH_BASE 0xdf000000
#endif
include/asm-arm/arch-rpc/hardware.h
-3
View File
@@ -46,7 +46,6 @@
#define SCREEN_END 0xdfc00000
#define SCREEN_BASE 0xdf800000
#define FLUSH_BASE 0xdf000000
#define UNCACHEABLE_ADDR 0xdf010000
/*
@@ -59,8 +58,6 @@
#define PCIO_BASE IOMEM(0xe0010000)
#define FLOPPYDMA_BASE IOMEM(0xe002a000)
#define FLUSH_BASE_PHYS 0x00000000 /* ROM */
#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
#define IO_EC_EASI_BASE 0x81400000
include/asm-arm/arch-rpc/memory.h
+6
View File
@@ -30,4 +30,10 @@
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
/*
* Cache flushing area - ROM
*/
#define FLUSH_BASE_PHYS 0x00000000
#define FLUSH_BASE 0xdf000000
#endif
include/asm-arm/arch-sa1100/hardware.h
-4
View File
@@ -14,10 +14,6 @@
#include <linux/config.h>
/* Flushing areas */
#define FLUSH_BASE_PHYS 0xe0000000 /* SA1100 zero bank */
#define FLUSH_BASE 0xf5000000
#define FLUSH_BASE_MINICACHE 0xf5800000
#define UNCACHEABLE_ADDR 0xfa050000
include/asm-arm/arch-sa1100/memory.h
+7
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@@ -91,4 +91,11 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
#endif
/*
* Cache flushing area - SA1100 zero bank
*/
#define FLUSH_BASE_PHYS 0xe0000000
#define FLUSH_BASE 0xf5000000
#define FLUSH_BASE_MINICACHE 0xf5100000
#endif
include/asm-arm/arch-shark/hardware.h
-6
View File
@@ -17,11 +17,6 @@
*/
#define IO_BASE 0xe0000000
/*
* RAM definitions
*/
#define FLUSH_BASE_PHYS 0x80000000
#else
#define IO_BASE 0
@@ -33,7 +28,6 @@
#define ROMCARD_SIZE 0x08000000
#define ROMCARD_START 0x10000000
#define FLUSH_BASE 0xdf000000
#define PCIO_BASE 0xe0000000
include/asm-arm/arch-shark/memory.h
+6
View File
@@ -39,4 +39,10 @@ static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsig
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
/*
* Cache flushing area
*/
#define FLUSH_BASE_PHYS 0x80000000
#define FLUSH_BASE 0xdf000000
#endif
include/asm-arm/fpstate.h
+2
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@@ -26,7 +26,9 @@
struct vfp_hard_struct {
__u64 fpregs[16];
#if __LINUX_ARM_ARCH__ < 6
__u32 fpmx_state;
#endif
__u32 fpexc;
__u32 fpscr;
/*
include/asm-arm/memory.h
+4 -4
View File
@@ -172,10 +172,10 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
* virt_addr_valid(k) indicates whether a virtual address is valid
*/
#ifndef CONFIG_DISCONTIGMEM
#define ARCH_PFN_OFFSET (PHYS_PFN_OFFSET)
#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET
#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
#define virt_to_page(kaddr) (pfn_to_page(__pa(kaddr) >> PAGE_SHIFT))
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
#define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory)
#define PHYS_TO_NID(addr) (0)
@@ -187,8 +187,8 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
* around in memory.
*/
#include <linux/numa.h>
#define arch_pfn_to_nid(pfn) (PFN_TO_NID(pfn))
#define arch_local_page_offset(pfn, nid) (LOCAL_MAP_NR((pfn) << PAGE_OFFSET))
#define arch_pfn_to_nid(pfn) PFN_TO_NID(pfn)
#define arch_local_page_offset(pfn, nid) LOCAL_MAP_NR((pfn) << PAGE_SHIFT)
#define pfn_valid(pfn) \
({ \
include/asm-arm/vfpmacros.h
+8
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@@ -16,10 +16,18 @@
@ read all the working registers back into the VFP
.macro VFPFLDMIA, base
#if __LINUX_ARM_ARCH__ < 6
LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15}
#else
LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15}
#endif
.endm
@ write all the working registers out of the VFP
.macro VFPFSTMIA, base
#if __LINUX_ARM_ARCH__ < 6
STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15}
#else
STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15}
#endif
.endm