wifi: rtw89: pci: interrupt v2 refine IMR for SER
During SER (system error recovery), expect to deal with only ISR related to halt. So, refine IMR configuration. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240121071826.10159-3-pkshih@realtek.com
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Kalle Valo
parent
57b9426952
commit
26cdaee43d
@@ -705,7 +705,7 @@ void rtw89_pci_recognize_intrs_v2(struct rtw89_dev *rtwdev,
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rtw89_read32(rtwdev, R_BE_HISR0) & rtwpci->halt_c2h_intrs : 0;
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isrs->isrs[0] = isrs->ind_isrs & B_BE_HCI_AXIDMA_INT ?
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rtw89_read32(rtwdev, R_BE_HAXI_HISR00) & rtwpci->intrs[0] : 0;
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isrs->isrs[1] = rtw89_read32(rtwdev, R_BE_PCIE_DMA_ISR);
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isrs->isrs[1] = rtw89_read32(rtwdev, R_BE_PCIE_DMA_ISR) & rtwpci->intrs[1];
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if (isrs->halt_c2h_isrs)
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rtw89_write32(rtwdev, R_BE_HISR0, isrs->halt_c2h_isrs);
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@@ -3452,8 +3452,7 @@ static void rtw89_pci_recovery_intr_mask_v2(struct rtw89_dev *rtwdev)
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rtwpci->ind_intrs = B_BE_HS0_IND_INT_EN0;
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rtwpci->halt_c2h_intrs = B_BE_HALT_C2H_INT_EN | B_BE_WDT_TIMEOUT_INT_EN;
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rtwpci->intrs[0] = 0;
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rtwpci->intrs[1] = B_BE_PCIE_RX_RX0P2_IMR0_V1 |
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B_BE_PCIE_RX_RPQ0_IMR0_V1;
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rtwpci->intrs[1] = 0;
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}
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static void rtw89_pci_default_intr_mask_v2(struct rtw89_dev *rtwdev)
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