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[POWERPC] Remove stale 64bit on 32bit kernel code

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Remove some stale POWER3/POWER4/970 on 32bit kernel support.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Anton Blanchard
2006-06-10 20:32:01 +10:00
committed by Paul Mackerras
parent 8555a0029b
commit 227318bbde
7 changed files with 1 additions and 94 deletions
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include/asm-powerpc/cputable.h
-19
View File
@@ -300,13 +300,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
CPU_FTR_COMMON)
#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE)
#define CPU_FTRS_POWER3_32 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE)
#define CPU_FTRS_POWER4_32 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_NODSISRALIGN)
#define CPU_FTRS_970_32 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_ALTIVEC_COMP | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN)
#define CPU_FTRS_8XX (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB)
#define CPU_FTRS_40X (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_NODSISRALIGN)
@@ -367,12 +360,6 @@ enum {
#else
CPU_FTRS_GENERIC_32 |
#endif
#ifdef CONFIG_PPC64BRIDGE
CPU_FTRS_POWER3_32 |
#endif
#ifdef CONFIG_POWER4
CPU_FTRS_POWER4_32 | CPU_FTRS_970_32 |
#endif
#ifdef CONFIG_8xx
CPU_FTRS_8XX |
#endif
@@ -412,12 +399,6 @@ enum {
#else
CPU_FTRS_GENERIC_32 &
#endif
#ifdef CONFIG_PPC64BRIDGE
CPU_FTRS_POWER3_32 &
#endif
#ifdef CONFIG_POWER4
CPU_FTRS_POWER4_32 & CPU_FTRS_970_32 &
#endif
#ifdef CONFIG_8xx
CPU_FTRS_8XX &
#endif
include/asm-ppc/mmu.h
-17
View File
@@ -31,20 +31,11 @@ typedef struct {
/* Hardware Page Table Entry */
typedef struct _PTE {
#ifdef CONFIG_PPC64BRIDGE
unsigned long long vsid:52;
unsigned long api:5;
unsigned long :5;
unsigned long h:1;
unsigned long v:1;
unsigned long long rpn:52;
#else /* CONFIG_PPC64BRIDGE */
unsigned long v:1; /* Entry is valid */
unsigned long vsid:24; /* Virtual segment identifier */
unsigned long h:1; /* Hash algorithm indicator */
unsigned long api:6; /* Abbreviated page index */
unsigned long rpn:20; /* Real (physical) page number */
#endif /* CONFIG_PPC64BRIDGE */
unsigned long :3; /* Unused */
unsigned long r:1; /* Referenced */
unsigned long c:1; /* Changed */
@@ -85,11 +76,7 @@ typedef struct _P601_BATU { /* Upper part of BAT for 601 processor */
} P601_BATU;
typedef struct _BATU { /* Upper part of BAT (all except 601) */
#ifdef CONFIG_PPC64BRIDGE
unsigned long long bepi:47;
#else /* CONFIG_PPC64BRIDGE */
unsigned long bepi:15; /* Effective page index (virtual address) */
#endif /* CONFIG_PPC64BRIDGE */
unsigned long :4; /* Unused */
unsigned long bl:11; /* Block size mask */
unsigned long vs:1; /* Supervisor valid */
@@ -104,11 +91,7 @@ typedef struct _P601_BATL { /* Lower part of BAT for 601 processor */
} P601_BATL;
typedef struct _BATL { /* Lower part of BAT (all except 601) */
#ifdef CONFIG_PPC64BRIDGE
unsigned long long brpn:47;
#else /* CONFIG_PPC64BRIDGE */
unsigned long brpn:15; /* Real page index (physical address) */
#endif /* CONFIG_PPC64BRIDGE */
unsigned long :10; /* Unused */
unsigned long w:1; /* Write-thru cache */
unsigned long i:1; /* Cache inhibit */