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Merge tag 'qcom-pinctrl-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into devel

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Qualcomm pinctrl Devicetree bindings changes for v6.3, part two

Several minor cleanups and fixes on Qualcomm pin controller Devicetree
bindings - add missing input-disable, correct GPIO pin name patterns in
bindings, correct number of GPIOs in gpio-ranges property.
This commit is contained in:
Linus Walleij
2023-02-08 16:07:59 +01:00
parent 6c83b2d94f 315dffb843
commit 1ec033f00c
12 changed files with 17 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
+1 -1
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@@ -56,7 +56,7 @@ $defs:
subnode.
items:
oneOf:
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"
- pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-6])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
minItems: 1
maxItems: 36
Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
+2 -2
View File
@@ -63,7 +63,7 @@ $defs:
subnode.
items:
oneOf:
- pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-7])$"
- pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1,
qdsd_data2, qdsd_data3 ]
@@ -127,7 +127,7 @@ examples:
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&tlmm 0 0 117>;
gpio-ranges = <&tlmm 0 0 113>;
interrupt-controller;
#interrupt-cells = <2>;
Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
+1 -1
View File
@@ -53,7 +53,7 @@ $defs:
subnode.
items:
oneOf:
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[01])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
sdc2_cmd, sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0,
qdsd_data1, qdsd_data2, qdsd_data3 ]
Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml
+3 -3
View File
@@ -34,10 +34,10 @@ properties:
gpio-reserved-ranges:
minItems: 1
maxItems: 75
maxItems: 73
gpio-line-names:
maxItems: 150
maxItems: 146
patternProperties:
"-state$":
@@ -63,7 +63,7 @@ $defs:
subnode.
items:
oneOf:
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-5])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
sdc2_cmd, sdc2_data, sdc3_clk, sdc3_cmd, sdc3_data ]
minItems: 1
Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
+1 -1
View File
@@ -59,7 +59,7 @@ $defs:
subnode.
items:
oneOf:
- pattern: "^gpio([0-9]|[1-9][0-9])$"
- pattern: "^gpio([0-9]|1[0-4])$"
minItems: 1
maxItems: 15
Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml
+1 -1
View File
@@ -134,7 +134,7 @@ examples:
clock-names = "core", "audio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpi_tlmm 0 0 18>;
gpio-ranges = <&lpi_tlmm 0 0 19>;
dmic01-state {
dmic01-clk-pins {
Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
+1 -1
View File
@@ -55,7 +55,7 @@ $defs:
List of gpio pins affected by the properties specified in this subnode.
items:
oneOf:
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"
- pattern: "^gpio([0-9]|[1-9][0-9]|10[0-7])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
minItems: 1
maxItems: 36
Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
+2 -2
View File
@@ -63,7 +63,7 @@ $defs:
subnode.
items:
oneOf:
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-6])$"
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"
- enum: [ ufs_reset, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
sdc2_cmd, sdc2_data ]
minItems: 1
@@ -134,7 +134,7 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&tlmm 0 0 157>;
gpio-ranges = <&tlmm 0 0 157>; /* GPIOs + ufs_reset */
gpio-wo-subnode-state {
pins = "gpio1";
Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml
+1 -1
View File
@@ -64,7 +64,7 @@ $defs:
subnode.
items:
oneOf:
- pattern: "^gpio([0-9]|[1-9][0-9])$"
- pattern: "^gpio([0-9]|1[0-3])$"
minItems: 1
maxItems: 14
Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
+1 -1
View File
@@ -131,6 +131,6 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&tlmm 0 0 180>;
gpio-ranges = <&tlmm 0 0 181>; /* GPIOs + ufs_reset */
wakeup-parent = <&pdc>;
};
Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml
+2 -1
View File
@@ -109,6 +109,7 @@ $defs:
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-disable: true
input-enable: true
output-high: true
output-low: true
@@ -129,7 +130,7 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&tlmm 0 0 203>;
gpio-ranges = <&tlmm 0 0 204>; /* GPIOs + ufs_reset */
gpio-wo-subnode-state {
pins = "gpio1";
Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
+1 -1
View File
@@ -65,7 +65,7 @@ $defs:
List of gpio pins affected by the properties specified in this
subnode.
items:
pattern: "^gpio([0-9]|[1-2][0-9])$"
pattern: "^gpio([0-9]|1[0-9]|2[0-2])$"
function:
enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data,