gpiolib support for the PXA architecture

This adds gpiolib support for the PXA architecture:
  - move all GPIO API functions from generic.c into gpio.c
  - convert the gpio_get/set_value macros into inline functions

This makes it easier to hook up GPIOs provided by external chips like
ASICs and CPLDs.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Jean Delvare <khali@linux-fr.org>
Cc: Eric Miao <eric.miao@marvell.com>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: Ben Gardner <bgardner@wabtec.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
[ Minor ARM fixup from David Brownell folded into this ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Philipp Zabel
2008-02-04 22:28:22 -08:00
committed by Linus Torvalds
parent 7c2db759ec
commit 1c44f5f16f
8 changed files with 240 additions and 126 deletions
+24 -32
View File
@@ -28,43 +28,35 @@
#include <asm/irq.h>
#include <asm/hardware.h>
static inline int gpio_request(unsigned gpio, const char *label)
#include <asm-generic/gpio.h>
/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
* Those cases currently cause holes in the GPIO number space.
*/
#define NR_BUILTIN_GPIO 128
static inline int gpio_get_value(unsigned gpio)
{
return 0;
}
static inline void gpio_free(unsigned gpio)
{
return;
}
extern int gpio_direction_input(unsigned gpio);
extern int gpio_direction_output(unsigned gpio, int value);
static inline int __gpio_get_value(unsigned gpio)
{
return GPLR(gpio) & GPIO_bit(gpio);
}
#define gpio_get_value(gpio) \
(__builtin_constant_p(gpio) ? \
__gpio_get_value(gpio) : \
pxa_gpio_get_value(gpio))
static inline void __gpio_set_value(unsigned gpio, int value)
{
if (value)
GPSR(gpio) = GPIO_bit(gpio);
if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO))
return GPLR(gpio) & GPIO_bit(gpio);
else
GPCR(gpio) = GPIO_bit(gpio);
return __gpio_get_value(gpio);
}
#define gpio_set_value(gpio,value) \
(__builtin_constant_p(gpio) ? \
__gpio_set_value(gpio, value) : \
pxa_gpio_set_value(gpio, value))
static inline void gpio_set_value(unsigned gpio, int value)
{
if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) {
if (value)
GPSR(gpio) = GPIO_bit(gpio);
else
GPCR(gpio) = GPIO_bit(gpio);
} else {
__gpio_set_value(gpio, value);
}
}
#include <asm-generic/gpio.h> /* cansleep wrappers */
#define gpio_cansleep __gpio_cansleep
#define gpio_to_irq(gpio) IRQ_GPIO(gpio)
#define irq_to_gpio(irq) IRQ_TO_GPIO(irq)
+13
View File
@@ -1131,6 +1131,19 @@
* General Purpose I/O
*/
#define GPIO0_BASE ((void __iomem *)io_p2v(0x40E00000))
#define GPIO1_BASE ((void __iomem *)io_p2v(0x40E00004))
#define GPIO2_BASE ((void __iomem *)io_p2v(0x40E00008))
#define GPIO3_BASE ((void __iomem *)io_p2v(0x40E00100))
#define GPLR_OFFSET 0x00
#define GPDR_OFFSET 0x0C
#define GPSR_OFFSET 0x18
#define GPCR_OFFSET 0x24
#define GRER_OFFSET 0x30
#define GFER_OFFSET 0x3C
#define GEDR_OFFSET 0x48
#define GPLR0 __REG(0x40E00000) /* GPIO Pin-Level Register GPIO<31:0> */
#define GPLR1 __REG(0x40E00004) /* GPIO Pin-Level Register GPIO<63:32> */
#define GPLR2 __REG(0x40E00008) /* GPIO Pin-Level Register GPIO<80:64> */