diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index a023c948afbd..533a3ad471e0 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -2066,6 +2066,10 @@ static const struct of_device_id tegra_soctherm_of_match[] = { .compatible = "nvidia,tegra210-soctherm", .data = &tegra210_soctherm, }, + { + .compatible = "nvidia,tegra210b01-soctherm", + .data = &tegra210b01_soctherm, + }, #endif { }, }; diff --git a/drivers/thermal/tegra/soctherm.h b/drivers/thermal/tegra/soctherm.h index 70501e73d586..0d80e739b67d 100644 --- a/drivers/thermal/tegra/soctherm.h +++ b/drivers/thermal/tegra/soctherm.h @@ -147,6 +147,7 @@ extern const struct tegra_soctherm_soc tegra132_soctherm; #ifdef CONFIG_ARCH_TEGRA_210_SOC extern const struct tegra_soctherm_soc tegra210_soctherm; +extern const struct tegra_soctherm_soc tegra210b01_soctherm; #endif #endif diff --git a/drivers/thermal/tegra/tegra210-soctherm.c b/drivers/thermal/tegra/tegra210-soctherm.c index d0ff793f18c5..b9871e12ec20 100644 --- a/drivers/thermal/tegra/tegra210-soctherm.c +++ b/drivers/thermal/tegra/tegra210-soctherm.c @@ -44,6 +44,14 @@ static const struct tegra_tsensor_configuration tegra210_tsensor_config = { .tsample_ate = 480, }; +static const struct tegra_tsensor_configuration tegra210b01_tsensor_config = { + .tall = 16300, + .tiddq_en = 1, + .ten_count = 1, + .tsample = 240, + .tsample_ate = 480, +}; + static const struct tegra_tsensor_group tegra210_tsensor_group_cpu = { .id = TEGRA124_SOCTHERM_SENSOR_CPU, .name = "cpu", @@ -125,6 +133,12 @@ static const struct tegra_tsensor_group *tegra210_tsensor_groups[] = { &tegra210_tsensor_group_mem, }; +static const struct tegra_tsensor_group *tegra210b01_tsensor_groups[] = { + &tegra210_tsensor_group_cpu, + &tegra210_tsensor_group_gpu, + &tegra210_tsensor_group_pll, +}; + static const struct tegra_tsensor tegra210_tsensors[] = { { .name = "cpu0", @@ -193,6 +207,58 @@ static const struct tegra_tsensor tegra210_tsensors[] = { }, }; +static const struct tegra_tsensor tegra210b01_tsensors[] = { + { + .name = "cpu0", + .base = 0xc0, + .config = &tegra210b01_tsensor_config, + .calib_fuse_offset = 0x098, + .fuse_corr_alpha = 1085000, + .fuse_corr_beta = 3244200, + .group = &tegra210_tsensor_group_cpu, + }, { + .name = "cpu1", + .base = 0xe0, + .config = &tegra210b01_tsensor_config, + .calib_fuse_offset = 0x084, + .fuse_corr_alpha = 1126200, + .fuse_corr_beta = -67500, + .group = &tegra210_tsensor_group_cpu, + }, { + .name = "cpu2", + .base = 0x100, + .config = &tegra210b01_tsensor_config, + .calib_fuse_offset = 0x088, + .fuse_corr_alpha = 1098400, + .fuse_corr_beta = 2251100, + .group = &tegra210_tsensor_group_cpu, + }, { + .name = "cpu3", + .base = 0x120, + .config = &tegra210b01_tsensor_config, + .calib_fuse_offset = 0x12c, + .fuse_corr_alpha = 1108000, + .fuse_corr_beta = 602700, + .group = &tegra210_tsensor_group_cpu, + }, { + .name = "gpu", + .base = 0x180, + .config = &tegra210b01_tsensor_config, + .calib_fuse_offset = 0x154, + .fuse_corr_alpha = 1074300, + .fuse_corr_beta = 2734900, + .group = &tegra210_tsensor_group_gpu, + }, { + .name = "pllx", + .base = 0x1a0, + .config = &tegra210b01_tsensor_config, + .calib_fuse_offset = 0x160, + .fuse_corr_alpha = 1039700, + .fuse_corr_beta = 6829100, + .group = &tegra210_tsensor_group_pll, + }, +}; + /* * Mask/shift bits in FUSE_TSENSOR_COMMON and * FUSE_TSENSOR_COMMON, which are described in @@ -226,3 +292,15 @@ const struct tegra_soctherm_soc tegra210_soctherm = { .use_ccroc = false, .thermtrips = tegra210_tsensor_thermtrips, }; + +const struct tegra_soctherm_soc tegra210b01_soctherm = { + .tsensors = tegra210b01_tsensors, + .num_tsensors = ARRAY_SIZE(tegra210b01_tsensors), + .ttgs = tegra210b01_tsensor_groups, + .num_ttgs = ARRAY_SIZE(tegra210b01_tsensor_groups), + .tfuse = &tegra210_soctherm_fuse, + .thresh_grain = TEGRA210_THRESH_GRAIN, + .bptt = TEGRA210_BPTT, + .use_ccroc = false, + .thermtrips = tegra210_tsensor_thermtrips, +};