Merge 6.12.34 into android16-6.12-lts
GKI (arm64) relevant 105 out of 506 changes, affecting 145 files +1290/-523623074162bsched: Fix trace_sched_switch(.prev_state) [1 file, +4/-2]781bbc8252perf/core: Fix broken throttling when max_samples_per_tick=1 [1 file, +8/-8]451a18d71bsched/core: Tweak wait_task_inactive() to force dequeue sched_delayed tasks [1 file, +6/-0]5b814cde62brd: fix aligned_sector from brd_do_discard() [1 file, +1/-1]48e11bcee9brd: fix discard end sector [1 file, +6/-3]9cfca45aecerofs: fix file handle encoding for 64-bit NIDs [1 file, +36/-8]65115472f7erofs: avoid using multiple devices with different type [1 file, +4/-1]58beaa1aeercu/cpu_stall_cputime: fix the hardirq count for x86 architecture [3 files, +10/-6]5ed92ad1b7crypto: xts - Only add ecb if it is not already there [1 file, +2/-2]e9ecaeaf41kunit: Fix wrong parameter to kunit_deactivate_static_stub() [1 file, +1/-1]9c094deb6bcrypto: api - Redo lookup on EEXIST [1 file, +11/-2]81d72f9241PM: EM: Fix potential division-by-zero error in em_compute_costs() [1 file, +4/-0]0426e92970PM: wakeup: Delete space in the end of string shown by pm_show_wakelocks() [1 file, +3/-0]77d45ba1bePM: sleep: Print PM debug messages during hibernation [3 files, +11/-1]45844a9403ALSA: core: fix up bus match const issues. [4 files, +8/-8]fa65c89f3farm64/fpsimd: Avoid RES0 bits in the SME trap handler [2 files, +9/-7]6103f9ba51arm64/fpsimd: Discard stale CPU state when handling SME traps [1 file, +2/-0]945d247d1carm64/fpsimd: Don't corrupt FPMR when streaming mode changes [1 file, +3/-3]55d52af498arm64/fpsimd: Avoid clobbering kernel FPSIMD state with SMSTOP [1 file, +1/-1]2756dac036arm64/fpsimd: Reset FPMR upon exec() [1 file, +3/-0]f5ffc750dbarm64/fpsimd: Fix merging of FPSIMD state during signal return [1 file, +1/-1]0860d48b70firmware: psci: Fix refcount leak in psci_dt_init [1 file, +3/-1]64a9ee6e11arm64/fpsimd: Avoid warning when sve_to_fpsimd() is unused [1 file, +2/-2]b3cfc1f9f5arm64/fpsimd: Do not discard modified SVE state [3 files, +47/-17]e55f46a11boverflow: Fix direct struct member initialization in _DEFINE_FLEX() [1 file, +3/-3]671dd1fb87bpf: Check link_create.flags parameter for multi_kprobe [1 file, +3/-0]3a8e680f7dbpf, sockmap: fix duplicated data transmission [1 file, +9/-5]3d25fa2d7fbpf, sockmap: Fix panic when calling skb_linearize [1 file, +16/-15]44a51592acf2fs: zone: fix to avoid inconsistence in between SIT and SSA [1 file, +3/-0]4f51fb0d25page_pool: Track DMA-mapped pages and unmap them when destroying the pool [5 files, +147/-18]88f65bb66diommu: Protect against overflow in iommu_pgsize() [1 file, +3/-1]04daca6012f2fs: clean up w/ fscrypt_is_bounce_page() [1 file, +1/-1]4248ba53e4f2fs: fix to detect gcing page in f2fs_is_cp_guaranteed() [1 file, +1/-1]c1f418cc27bpf: Allow XDP dev-bound programs to perform XDP_REDIRECT into maps [1 file, +16/-11]e53a8dcd36tracing: Move histogram trigger variables from stack to per CPU structure [1 file, +105/-15]69a995644aefi/libstub: Describe missing 'out' parameter in efi_load_initrd [1 file, +1/-0]709412b92atracing: Fix error handling in event_trigger_parse() [1 file, +2/-2]c98cdf6795bpf: Fix WARN() in get_bpf_raw_tp_regs [1 file, +1/-1]e0657136aescsi: ufs: mcq: Delete ufshcd_release_scsi_cmd() in ufshcd_mcq_abort() [1 file, +0/-6]6bfb154f95kernfs: Relax constraint in draining guard [2 files, +5/-3]df00f9147eBluetooth: ISO: Fix not using SID from adv report [5 files, +75/-14]1d249cc92dbpf: Revert "bpf: remove unnecessary rcu_read_{lock,unlock}() in multi-uprobe attach logic" [1 file, +2/-0]1750c3f1d9Bluetooth: MGMT: iterate over mesh commands in mgmt_mesh_foreach() [1 file, +1/-1]15c0250daebpf, sockmap: Avoid using sk_socket after free when sending [1 file, +8/-0]30a9e834c7net: usb: aqc111: fix error handling of usbnet read calls [1 file, +8/-2]7893a41deavsock/virtio: fix `rx_bytes` accounting for stream sockets [2 files, +17/-10]2bc6dffb4bbpf: Avoid __bpf_prog_ret0_warn when jit fails [1 file, +1/-1]ddc654e89anet: phy: clear phydev->devlink when the link is deleted [1 file, +3/-1]f15ed37dd3net: phy: fix up const issues in to_mdio_device() and to_phy_device() [2 files, +2/-8]532601e783f2fs: use d_inode(dentry) cleanup dentry->d_inode [2 files, +6/-6]0befc3005df2fs: fix to correct check conditions in f2fs_cross_rename [1 file, +1/-1]2eeb181e76dm: don't change md if dm_table_set_restrictions() fails [1 file, +12/-10]48e0b54be4dm: free table mempools if not used in __bind [1 file, +4/-4]17e4b0fcd2PCI: Print the actual delay time in pci_bridge_wait_for_secondary_bus() [1 file, +1/-1]0a3e2ec508PCI: endpoint: Retain fixed-size BAR size as well as aligned size [2 files, +18/-7]9f40ae8310USB: gadget: udc: fix const issue in gadget_match_driver() [1 file, +1/-1]4bd30962f3USB: typec: fix const issue in typec_match() [1 file, +1/-1]3091d4c0d0loop: add file_start_write() and file_end_write() [1 file, +6/-2]90891eadb8Fix sock_exceed_buf_limit not being triggered in __sk_mem_raise_allocated [1 file, +4/-4]e869a85accpage_pool: Fix use-after-free in page_pool_recycle_in_ring [1 file, +14/-13]c762fc79d7net: tipc: fix refcount warning in tipc_aead_encrypt [1 file, +5/-1]b788cebf72Bluetooth: L2CAP: Fix not responding with L2CAP_CR_LE_ENCRYPTION [1 file, +2/-1]4399f59a94net: fix udp gso skb_segment after pull from frag_list [1 file, +5/-0]0cffc6e40dPM: sleep: Fix power.is_suspended cleanup for direct-complete devices [1 file, +2/-1]f34dc858e6netfilter: nf_nat: also check reverse tuple to obtain clashing entry [1 file, +9/-3]4f0fcdb835wifi: cfg80211/mac80211: correctly parse S1G beacon optional elements [4 files, +83/-32]933466fc50wireguard: device: enable threaded NAPI [1 file, +1/-0]1be1f3b848iov_iter: use iov_offset for length calculation in iov_iter_aligned_bvec [1 file, +1/-1]1d79230719path_overmount(): avoid false negatives [1 file, +13/-6]e1d02fe504fix propagation graph breakage by MOVE_MOUNT_SET_GROUP move_mount(2) [1 file, +1/-1]9c1ddfeb66do_change_type(): refuse to operate on unmounted/not ours mounts [1 file, +4/-0]80f7c5be4fpmdomain: core: Introduce dev_pm_genpd_rpm_always_on() [2 files, +42/-0]3464a707d1scsi: core: ufs: Fix a hang in the error handler [1 file, +6/-1]99e3d69853Bluetooth: hci_core: fix list_for_each_entry_rcu usage [1 file, +3/-8]9df3e5e7f7Bluetooth: MGMT: Fix UAF on mgmt_remove_adv_monitor_complete [3 files, +12/-30]84ab1283ebBluetooth: MGMT: Remove unused mgmt_pending_find_data [2 files, +0/-21]4e83f2dbb2Bluetooth: MGMT: Protect mgmt_pending list with its own lock [5 files, +80/-59]d1bc80da75net_sched: sch_sfq: fix a potential crash on gso_skb handling [1 file, +4/-1]1e0de7582cnet: Fix TOCTOU issue in sk_is_readable() [1 file, +5/-2]78fa7b723emacsec: MACsec SCI assignment for ES = 0 [1 file, +34/-6]b02d9d2732net/mdiobus: Fix potential out-of-bounds read/write access [1 file, +6/-0]31bf7b2b92net/mdiobus: Fix potential out-of-bounds clause 45 read/write access [1 file, +6/-0]842f7c3154Bluetooth: Fix NULL pointer deference on eir_get_service_data [1 file, +6/-4]907ef6e12fBluetooth: hci_sync: Fix broadcast/PA when using an existing instance [1 file, +15/-5]2af40d795dBluetooth: eir: Fix possible crashes on eir_create_adv_data [3 files, +8/-6]7a41744e38Bluetooth: MGMT: Fix sparse errors [1 file, +2/-2]e3f6745006net_sched: prio: fix a race in prio_tune() [1 file, +1/-1]180b12eafanet_sched: tbf: fix a race in tbf_change() [1 file, +1/-1]0a2500782ffs/filesystems: Fix potential unsigned integer underflow in fs_name() [1 file, +9/-5]f351bb3085perf: Ensure bpf_perf_link path is properly serialized [1 file, +30/-4]a5c7b61eedblock: use q->elevator with ->elevator_lock held in elv_iosched_show() [1 file, +1/-2]af8c13f9eeio_uring: fix use-after-free of sq->thread in __io_uring_show_fdinfo() [2 files, +14/-7]0fccb6773bblock: don't use submit_bio_noacct_nocheck in blk_zone_wplug_bio_work [1 file, +5/-2]48f33ec141io_uring: consistently use rcu semantics with sqpoll thread [4 files, +38/-15]a9022c8631bio: Fix bio_first_folio() for SPARSEMEM without VMEMMAP [1 file, +1/-1]4b1ef15ffdblock: Fix bvec_set_folio() for very large folios [1 file, +5/-2]84e9f0a2c2ALSA: usb-audio: Add implicit feedback quirk for RODE AI-1 [1 file, +1/-0]c29d531870posix-cpu-timers: fix race between handle_posix_cpu_timers() and posix_cpu_timer_del() [1 file, +9/-0]657003ced7usb: Flush altsetting 0 endpoints before reinitializating them after reset. [1 file, +14/-2]7bdd712abeusb: typec: tcpm: move tcpm_queue_vdm_unlocked to asynchronous work [1 file, +71/-20]b8df8cb8f7ring-buffer: Do not trigger WARN_ON() due to a commit_overrun [1 file, +18/-8]e09c0600bering-buffer: Fix buffer locking in ring_buffer_subbuf_order_set() [1 file, +1/-3]2d6a6cfe96ring-buffer: Move cpus_read_lock() outside of buffer->mutex [1 file, +6/-5]5ed1d7a700net: usb: aqc111: debug info before sanitation [1 file, +4/-4]ab20b0bdb0overflow: Introduce __DEFINE_FLEX for having no initializer [1 file, +19/-6] Changes in 6.12.34 tools/x86/kcpuid: Fix error handling x86/idle: Remove MFENCEs for X86_BUG_CLFLUSH_MONITOR in mwait_idle_with_hints() and prefer_mwait_c1_over_halt() crypto: sun8i-ce-hash - fix error handling in sun8i_ce_hash_run() sched: Fix trace_sched_switch(.prev_state) perf/x86/amd/uncore: Remove unused 'struct amd_uncore_ctx::node' member perf/x86/amd/uncore: Prevent UMC counters from saturating gfs2: replace sd_aspace with sd_inode gfs2: gfs2_create_inode error handling fix perf/core: Fix broken throttling when max_samples_per_tick=1 crypto: sun8i-ce-cipher - fix error handling in sun8i_ce_cipher_prepare() crypto: sun8i-ss - do not use sg_dma_len before calling DMA functions powerpc: do not build ppc_save_regs.o always powerpc/crash: Fix non-smp kexec preparation sched/core: Tweak wait_task_inactive() to force dequeue sched_delayed tasks x86/microcode/AMD: Do not return error when microcode update is not necessary crypto: sun8i-ce - undo runtime PM changes during driver removal x86/cpu: Sanitize CPUID(0x80000000) output x86/insn: Fix opcode map (!REX2) superscript tags brd: fix aligned_sector from brd_do_discard() brd: fix discard end sector kselftest: cpufreq: Get rid of double suspend in rtcwake case crypto: marvell/cesa - Handle zero-length skcipher requests crypto: marvell/cesa - Avoid empty transfer descriptor erofs: fix file handle encoding for 64-bit NIDs erofs: avoid using multiple devices with different type powerpc/pseries/iommu: Fix kmemleak in TCE table userspace view btrfs: scrub: update device stats when an error is detected btrfs: scrub: fix a wrong error type when metadata bytenr mismatches btrfs: fix invalid data space release when truncating block in NOCOW mode rcu/cpu_stall_cputime: fix the hardirq count for x86 architecture crypto: lrw - Only add ecb if it is not already there crypto: xts - Only add ecb if it is not already there crypto: sun8i-ce - move fallback ahash_request to the end of the struct kunit: Fix wrong parameter to kunit_deactivate_static_stub() crypto: api - Redo lookup on EEXIST ACPICA: exserial: don't forget to handle FFixedHW opregions for reading ASoC: tas2764: Enable main IRQs ASoC: mediatek: mt8195: Set ETDM1/2 IN/OUT to COMP_DUMMY() EDAC/skx_common: Fix general protection fault EDAC/{skx_common,i10nm}: Fix the loss of saved RRL for HBM pseudo channel 0 spi: tegra210-quad: Fix X1_X2_X4 encoding and support x4 transfers spi: tegra210-quad: remove redundant error handling code spi: tegra210-quad: modify chip select (CS) deactivation power: reset: at91-reset: Optimize at91_reset() PM: EM: Fix potential division-by-zero error in em_compute_costs() ASoC: SOF: ipc4-pcm: Adjust pipeline_list->pipelines allocation type ASoC: SOF: amd: add missing acp descriptor field PM: wakeup: Delete space in the end of string shown by pm_show_wakelocks() ACPI: resource: fix a typo for MECHREVO in irq1_edge_low_force_override[] x86/mtrr: Check if fixed-range MTRRs exist in mtrr_save_fixed_ranges() PM: sleep: Print PM debug messages during hibernation thermal/drivers/mediatek/lvts: Fix debugfs unregister on failure ACPI: OSI: Stop advertising support for "3.0 _SCP Extensions" spi: sh-msiof: Fix maximum DMA transfer size ASoC: apple: mca: Constrain channels according to TDM mask ALSA: core: fix up bus match const issues. drm/vmwgfx: Add seqno waiter for sync_files drm/vmwgfx: Add error path for xa_store in vmw_bo_add_detached_resource drm/vmwgfx: Fix dumb buffer leak drm/xe/d3cold: Set power state to D3Cold during s2idle/s3 drm/vc4: tests: Use return instead of assert drm/amd/pp: Fix potential NULL pointer dereference in atomctrl_initialize_mc_reg_table media: rkvdec: Fix frame size enumeration arm64/fpsimd: Avoid RES0 bits in the SME trap handler arm64/fpsimd: Discard stale CPU state when handling SME traps arm64/fpsimd: Don't corrupt FPMR when streaming mode changes arm64/fpsimd: Avoid clobbering kernel FPSIMD state with SMSTOP arm64/fpsimd: Reset FPMR upon exec() arm64/fpsimd: Fix merging of FPSIMD state during signal return drm/panthor: Fix GPU_COHERENCY_ACE[_LITE] definitions drm/panthor: Update panthor_mmu::irq::mask when needed perf: arm-ni: Unregister PMUs on probe failure perf: arm-ni: Fix missing platform_set_drvdata() drm/panel: samsung-sofef00: Drop s6e3fc2x01 support drm/bridge: lt9611uxc: Fix an error handling path in lt9611uxc_probe() fs/ntfs3: handle hdr_first_de() return value fs/ntfs3: Add missing direct_IO in ntfs_aops_cmpr kunit/usercopy: Disable u64 test on 32-bit SPARC watchdog: exar: Shorten identity name to fit correctly m68k: mac: Fix macintosh_config for Mac II firmware: psci: Fix refcount leak in psci_dt_init arm64: Support ARM64_VA_BITS=52 when setting ARCH_MMAP_RND_BITS_MAX arm64/fpsimd: Avoid warning when sve_to_fpsimd() is unused selftests/seccomp: fix syscall_restart test for arm compat drm/msm/dpu: enable SmartDMA on SM8150 drm/msm/dpu: enable SmartDMA on SC8180X drm: rcar-du: Fix memory leak in rcar_du_vsps_init() drm/vkms: Adjust vkms_state->active_planes allocation type drm/tegra: rgb: Fix the unbound reference count firmware: SDEI: Allow sdei initialization without ACPI_APEI_GHES arm64/fpsimd: Do not discard modified SVE state overflow: Fix direct struct member initialization in _DEFINE_FLEX() scsi: qedf: Use designated initializer for struct qed_fcoe_cb_ops perf/amlogic: Replace smp_processor_id() with raw_smp_processor_id() in meson_ddr_pmu_create() selftests/seccomp: fix negative_ENOSYS tracer tests on arm32 drm/msm/a6xx: Disable rgb565_predicator on Adreno 7c3 drm/mediatek: mtk_drm_drv: Fix kobject put for mtk_mutex device ptr drm/mediatek: Fix kobject put for component sub-drivers drm/mediatek: mtk_drm_drv: Unbind secondary mmsys components on err media: verisilicon: Free post processor buffers on error svcrdma: Reduce the number of rdma_rw contexts per-QP xen/x86: fix initial memory balloon target wifi: ath11k: fix node corruption in ar->arvifs list wifi: ath12k: Fix memory leak during vdev_id mismatch wifi: ath12k: Fix invalid memory access while forming 802.11 header IB/cm: use rwlock for MAD agent lock bpf: Check link_create.flags parameter for multi_kprobe selftests/bpf: Fix bpf_nf selftest failure bpf: fix ktls panic with sockmap bpf, sockmap: fix duplicated data transmission bpf, sockmap: Fix panic when calling skb_linearize f2fs: zone: fix to avoid inconsistence in between SIT and SSA wifi: ath12k: fix cleanup path after mhi init wifi: ath12k: Fix WMI tag for EHT rate in peer assoc wifi: ath12k: Fix buffer overflow in debugfs f2fs: clean up unnecessary indentation f2fs: prevent the current section from being selected as a victim during GC f2fs: fix to do sanity check on sbi->total_valid_block_count page_pool: Move pp_magic check into helper functions page_pool: Track DMA-mapped pages and unmap them when destroying the pool net: ncsi: Fix GCPS 64-bit member variables libbpf: Fix buffer overflow in bpf_object__init_prog net/mlx5: Avoid using xso.real_dev unnecessarily xfrm: Use xdo.dev instead of xdo.real_dev wifi: rtw88: sdio: map mgmt frames to queue TX_DESC_QSEL_MGMT wifi: rtw88: sdio: call rtw_sdio_indicate_tx_status unconditionally wifi: rtw88: do not ignore hardware read error during DPK wifi: ath12k: fix invalid access to memory wifi: ath12k: Add MSDU length validation for TKIP MIC error wifi: ath12k: Fix the QoS control field offset to build QoS header wifi: ath12k: fix node corruption in ar->arvifs list RDMA/hns: Include hnae3.h in hns_roce_hw_v2.h scsi: hisi_sas: Call I_T_nexus after soft reset for SATA disk libbpf: Fix event name too long error libbpf: Remove sample_period init in perf_buffer Use thread-safe function pointer in libbpf_print iommu: Protect against overflow in iommu_pgsize() bonding: assign random address if device address is same as bond f2fs: clean up w/ fscrypt_is_bounce_page() f2fs: fix to detect gcing page in f2fs_is_cp_guaranteed() scsi: smartpqi: Fix smp_processor_id() call trace for preemptible kernels libbpf: Use proper errno value in linker bpf: Allow XDP dev-bound programs to perform XDP_REDIRECT into maps netfilter: bridge: Move specific fragmented packet to slow_path instead of dropping it netfilter: nft_quota: match correctly when the quota just depleted netfilter: nft_set_pipapo: prevent overflow in lookup table allocation RDMA/mlx5: Fix error flow upon firmware failure for RQ destruction bpf: Fix uninitialized values in BPF_{CORE,PROBE}_READ tracing: Move histogram trigger variables from stack to per CPU structure clk: qcom: camcc-sm6350: Add *_wait_val values for GDSCs clk: qcom: dispcc-sm6350: Add *_wait_val values for GDSCs clk: qcom: gcc-sm6350: Add *_wait_val values for GDSCs clk: qcom: gpucc-sm6350: Add *_wait_val values for GDSCs bpftool: Fix regression of "bpftool cgroup tree" EINVAL on older kernels clk: bcm: rpi: Add NULL check in raspberrypi_clk_register() wifi: iwlfiwi: mvm: Fix the rate reporting efi/libstub: Describe missing 'out' parameter in efi_load_initrd selftests/bpf: Fix caps for __xlated/jited_unpriv tracing: Rename event_trigger_alloc() to trigger_data_alloc() tracing: Fix error handling in event_trigger_parse() of: unittest: Unlock on error in unittest_data_add() ktls, sockmap: Fix missing uncharge operation libbpf: Use proper errno value in nlattr pinctrl: at91: Fix possible out-of-boundary access bpf: Fix WARN() in get_bpf_raw_tp_regs dt-bindings: soc: fsl,qman-fqd: Fix reserved-memory.yaml reference clk: qcom: gcc-msm8939: Fix mclk0 & mclk1 for 24 MHz s390/bpf: Store backchain even for leaf progs wifi: rtw89: pci: enlarge retry times of RX tag to 1000 wifi: rtw88: fix the 'para' buffer size to avoid reading out of bounds wifi: rtw89: fix firmware scan delay unit for WiFi 6 chips iommu: remove duplicate selection of DMAR_TABLE wifi: ath12k: fix memory leak in ath12k_service_ready_ext_event hisi_acc_vfio_pci: fix XQE dma address error hisi_acc_vfio_pci: add eq and aeq interruption restore hisi_acc_vfio_pci: bugfix live migration function without VF device driver wifi: ath9k_htc: Abort software beacon handling if disabled scsi: ufs: mcq: Delete ufshcd_release_scsi_cmd() in ufshcd_mcq_abort() kernfs: Relax constraint in draining guard Bluetooth: ISO: Fix not using SID from adv report wifi: mt76: mt7996: Fix null-ptr-deref in mt7996_mmio_wed_init() wifi: mt76: mt7915: Fix null-ptr-deref in mt7915_mmio_wed_init() wifi: mt76: mt7925: prevent multiple scan commands wifi: mt76: mt7925: refine the sniffer commnad wifi: mt76: mt7925: ensure all MCU commands wait for response wifi: mt76: mt7996: set EHT max ampdu length capability wifi: mt76: mt7996: fix RX buffer size of MCU event bpf: Revert "bpf: remove unnecessary rcu_read_{lock,unlock}() in multi-uprobe attach logic" netfilter: xtables: support arpt_mark and ipv6 optstrip for iptables-nft only builds netfilter: nf_tables: nft_fib_ipv6: fix VRF ipv4/ipv6 result discrepancy vfio/type1: Fix error unwind in migration dirty bitmap allocation Bluetooth: MGMT: iterate over mesh commands in mgmt_mesh_foreach() Bluetooth: btintel: Check dsbr size from EFI variable bpf, sockmap: Avoid using sk_socket after free when sending netfilter: nf_tables: nft_fib: consistent l3mdev handling netfilter: nft_tunnel: fix geneve_opt dump RISC-V: KVM: lock the correct mp_state during reset net: usb: aqc111: fix error handling of usbnet read calls vsock/virtio: fix `rx_bytes` accounting for stream sockets RDMA/cma: Fix hang when cma_netevent_callback fails to queue_work net: lan966x: Fix 1-step timestamping over ipv4 or ipv6 net: xilinx: axienet: Fix Tx skb circular buffer occupancy check in dmaengine xmit bpf: Avoid __bpf_prog_ret0_warn when jit fails net: phy: clear phydev->devlink when the link is deleted net: phy: fix up const issues in to_mdio_device() and to_phy_device() net: lan743x: rename lan743x_reset_phy to lan743x_hw_reset_phy net: lan743x: Fix PHY reset handling during initialization and WOL net: phy: mscc: Fix memory leak when using one step timestamping octeontx2-pf: QOS: Perform cache sync on send queue teardown octeontx2-pf: QOS: Refactor TC_HTB_LEAF_DEL_LAST callback calipso: Don't call calipso functions for AF_INET sk. net: openvswitch: Fix the dead loop of MPLS parse net: phy: mscc: Stop clearing the the UDPv4 checksum for L2 frames f2fs: use d_inode(dentry) cleanup dentry->d_inode f2fs: fix to correct check conditions in f2fs_cross_rename arm64: dts: qcom: x1e80100: Mark usb_2 as dma-coherent arm64: dts: qcom: sm8650: setup gpu thermal with higher temperatures arm64: dts: qcom: sm8650: add missing cpu-cfg interconnect path in the mdss node arm64: dts: qcom: x1e80100-romulus: Keep L12B and L15B always on arm64: dts: qcom: sdm845-starqltechn: remove wifi arm64: dts: qcom: sdm845-starqltechn: fix usb regulator mistake arm64: dts: qcom: sdm845-starqltechn: refactor node order arm64: dts: qcom: sdm845-starqltechn: remove excess reserved gpios arm64: dts: qcom: sm8350: Reenable crypto & cryptobam arm64: dts: qcom: sm8250: Fix CPU7 opp table arm64: dts: qcom: sc8280xp-x13s: Drop duplicate DMIC supplies arm64: dts: qcom: ipq9574: Fix USB vdd info arm64: dts: rockchip: Move SHMEM memory to reserved memory on rk3588 ARM: dts: at91: usb_a9263: fix GPIO for Dataflash chip select ARM: dts: at91: at91sam9263: fix NAND chip selects arm64: dts: mediatek: mt8195: Reparent vdec1/2 and venc1 power domains arm64: dts: qcom: sdm660-xiaomi-lavender: Add missing SD card detect GPIO arm64: dts: mt8183: Add port node to mt8183.dtsi arm64: dts: imx8mm-beacon: Fix RTC capacitive load arm64: dts: imx8mn-beacon: Fix RTC capacitive load arm64: dts: imx8mp-beacon: Fix RTC capacitive load arm64: dts: imx8mm-beacon: Set SAI5 MCLK direction to output for HDMI audio arm64: dts: imx8mn-beacon: Set SAI5 MCLK direction to output for HDMI audio arm64: dts: mediatek: mt6357: Drop regulator-fixed compatibles arm64: dts: mt6359: Add missing 'compatible' property to regulators node arm64: dts: qcom: sdm660-lavender: Add missing USB phy supply arm64: dts: qcom: sda660-ifc6560: Fix dt-validate warning arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-rock3c arm64: dts: rockchip: Update eMMC for NanoPi R5 series arm64: tegra: Drop remaining serial clock-names and reset-names arm64: tegra: Add uartd serial alias for Jetson TX1 module arm64: dts: ti: k3-j721e-common-proc-board: Enable OSPI1 on J721E soc: qcom: smp2p: Fix fallback to qcom,ipc parse Squashfs: check return result of sb_min_blocksize ocfs2: fix possible memory leak in ocfs2_finish_quota_recovery nilfs2: add pointer check for nilfs_direct_propagate() nilfs2: do not propagate ENOENT error from nilfs_btree_propagate() bus: fsl-mc: fix double-free on mc_dev dt-bindings: vendor-prefixes: Add Liontron name ARM: dts: qcom: apq8064: add missing clocks to the timer node ARM: dts: qcom: apq8064 merge hw splinlock into corresponding syscon device ARM: dts: qcom: apq8064: move replicator out of soc node arm64: defconfig: mediatek: enable PHY drivers arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma with Haikou arm64: dts: qcom: qcm2290: fix (some) of QUP interconnects arm64: dts: renesas: white-hawk-ard-audio: Fix TPU0 groups arm64: dts: mt6359: Rename RTC node to match binding expectations ARM: aspeed: Don't select SRAM soc: aspeed: lpc: Fix impossible judgment condition soc: aspeed: Add NULL check in aspeed_lpc_enable_snoop() fbdev: core: fbcvt: avoid division by 0 in fb_cvt_hperiod() randstruct: gcc-plugin: Remove bogus void member randstruct: gcc-plugin: Fix attribute addition perf build: Warn when libdebuginfod devel files are not available perf ui browser hists: Set actions->thread before calling do_zoom_thread() dm: don't change md if dm_table_set_restrictions() fails dm: free table mempools if not used in __bind backlight: pm8941: Add NULL check in wled_configure() x86/irq: Ensure initial PIR loads are performed exactly once mtd: nand: ecc-mxic: Fix use of uninitialized variable ret hwmon: (asus-ec-sensors) check sensor index in read_string() perf symbol-minimal: Fix double free in filename__read_build_id dm: fix dm_blk_report_zones dm-flakey: error all IOs when num_features is absent dm-flakey: make corrupting read bios work perf trace: Fix leaks of 'struct thread' in set_filter_loop_pids() perf tests: Fix 'perf report' tests installation perf intel-pt: Fix PEBS-via-PT data_src perf scripts python: exported-sql-viewer.py: Fix pattern matching with Python 3 remoteproc: qcom_wcnss_iris: Add missing put_device() on error in probe remoteproc: k3-r5: Drop check performed in k3_r5_rproc_{mbox_callback/kick} remoteproc: k3-dsp: Drop check performed in k3_dsp_rproc_{mbox_callback/kick} rpmsg: qcom_smd: Fix uninitialized return variable in __qcom_smd_send() mfd: exynos-lpass: Fix an error handling path in exynos_lpass_probe() mfd: exynos-lpass: Avoid calling exynos_lpass_disable() twice in exynos_lpass_remove() mfd: stmpe-spi: Correct the name used in MODULE_DEVICE_TABLE perf tests switch-tracking: Fix timestamp comparison mailbox: imx: Fix TXDB_V2 sending mailbox: mtk-cmdq: Refine GCE_GCTL_VALUE setting perf symbol: Fix use-after-free in filename__read_build_id perf record: Fix incorrect --user-regs comments perf trace: Always print return value for syscalls returning a pid nfs: clear SB_RDONLY before getting superblock nfs: ignore SB_RDONLY when remounting nfs perf trace: Set errpid to false for rseq and set_robust_list perf callchain: Always populate the addr_location map when adding IP cifs: Fix validation of SMB1 query reparse point response rust: alloc: add missing invariant in Vec::set_len() rtc: sh: assign correct interrupts with DT phy: rockchip: samsung-hdptx: Fix clock ratio setup phy: rockchip: samsung-hdptx: Do no set rk_hdptx_phy->rate in case of errors PCI: Print the actual delay time in pci_bridge_wait_for_secondary_bus() PCI: rcar-gen4: set ep BAR4 fixed size PCI: cadence: Fix runtime atomic count underflow PCI: apple: Use gpiod_set_value_cansleep in probe flow phy: qcom-qmp-usb: Fix an NULL vs IS_ERR() bug dmaengine: ti: Add NULL check in udma_probe() PCI/ACPI: Fix allocated memory release on error in pci_acpi_scan_root() PCI/DPC: Initialize aer_err_info before using it PCI/DPC: Log Error Source ID only when valid rtc: loongson: Add missing alarm notifications for ACPI RTC events PCI: endpoint: Retain fixed-size BAR size as well as aligned size usb: renesas_usbhs: Reorder clock handling and power management in probe serial: Fix potential null-ptr-deref in mlb_usio_probe() thunderbolt: Fix a logic error in wake on connect iio: filter: admv8818: fix band 4, state 15 iio: filter: admv8818: fix integer overflow iio: filter: admv8818: fix range calculation iio: filter: admv8818: Support frequencies >= 2^32 iio: adc: ad7124: Fix 3dB filter frequency reading usb: acpi: Prevent null pointer dereference in usb_acpi_add_usb4_devlink() MIPS: Loongson64: Add missing '#interrupt-cells' for loongson64c_ls7a coresight: Fixes device's owner field for registered using coresight_init_driver() coresight: catu: Introduce refcount and spinlock for enabling/disabling counter: interrupt-cnt: Protect enable/disable OPs with mutex fpga: fix potential null pointer deref in fpga_mgr_test_img_load_sgt() coresight: prevent deactivate active config while enabling the config vt: remove VT_RESIZE and VT_RESIZEX from vt_compat_ioctl() mei: vsc: Cast tx_buf to (__be32 *) when passed to cpu_to_be32_array() iio: adc: PAC1934: fix typo in documentation link iio: adc: mcp3911: fix device dependent mappings for conversion result registers USB: gadget: udc: fix const issue in gadget_match_driver() USB: typec: fix const issue in typec_match() loop: add file_start_write() and file_end_write() drm/xe: Make xe_gt_freq part of the Documentation Fix sock_exceed_buf_limit not being triggered in __sk_mem_raise_allocated page_pool: Fix use-after-free in page_pool_recycle_in_ring net: stmmac: platform: guarantee uniqueness of bus_id gve: Fix RX_BUFFERS_POSTED stat to report per-queue fill_cnt net: tipc: fix refcount warning in tipc_aead_encrypt driver: net: ethernet: mtk_star_emac: fix suspend/resume issue net/mlx4_en: Prevent potential integer overflow calculating Hz net: lan966x: Make sure to insert the vlan tags also in host mode spi: bcm63xx-spi: fix shared reset spi: bcm63xx-hsspi: fix shared reset Bluetooth: L2CAP: Fix not responding with L2CAP_CR_LE_ENCRYPTION ice: fix Tx scheduler error handling in XDP callback ice: create new Tx scheduler nodes for new queues only ice: fix rebuilding the Tx scheduler tree for large queue counts idpf: fix a race in txq wakeup idpf: avoid mailbox timeout delays during reset net: dsa: tag_brcm: legacy: fix pskb_may_pull length net: stmmac: make sure that ptp_rate is not 0 before configuring timestamping net: stmmac: make sure that ptp_rate is not 0 before configuring EST drm/i915/guc: Check if expecting reply before decrementing outstanding_submission_g2h drm/i915/psr: Fix using wrong mask in REG_FIELD_PREP drm/i915/guc: Handle race condition where wakeref count drops below 0 net: fix udp gso skb_segment after pull from frag_list net: wwan: t7xx: Fix napi rx poll issue vmxnet3: correctly report gso type for UDP tunnels selftests: net: build net/lib dependency in all target PM: sleep: Fix power.is_suspended cleanup for direct-complete devices nvme: fix command limits status code gve: add missing NULL check for gve_alloc_pending_packet() in TX DQO drm/panel-simple: fix the warnings for the Evervision VGG644804 netfilter: nf_set_pipapo_avx2: fix initial map fill netfilter: nf_nat: also check reverse tuple to obtain clashing entry net: ti: icssg-prueth: Fix swapped TX stats for MII interfaces. net: dsa: b53: do not enable RGMII delay on bcm63xx net: dsa: b53: allow RGMII for bcm63xx RGMII ports net: dsa: b53: do not touch DLL_IQQD on bcm53115 wifi: cfg80211/mac80211: correctly parse S1G beacon optional elements net: wwan: mhi_wwan_mbim: use correct mux_id for multiplexing wireguard: device: enable threaded NAPI seg6: Fix validation of nexthop addresses riscv: misaligned: fix sleeping function called during misaligned access handling scsi: ufs: qcom: Prevent calling phy_exit() before phy_init() ASoC: codecs: hda: Fix RPM usage count underflow ASoC: Intel: avs: Fix deadlock when the failing IPC is SET_D0IX ASoC: Intel: avs: Verify content returned by parse_int_array() ASoC: ti: omap-hdmi: Re-add dai_link->platform to fix card init iov_iter: use iov_offset for length calculation in iov_iter_aligned_bvec path_overmount(): avoid false negatives fix propagation graph breakage by MOVE_MOUNT_SET_GROUP move_mount(2) do_change_type(): refuse to operate on unmounted/not ours mounts tools/power turbostat: Fix AMD package-energy reporting ALSA: hda/realtek: fix micmute LEDs on HP Laptops with ALC3315 ALSA: hda/realtek: fix micmute LEDs on HP Laptops with ALC3247 ALSA: hda/realtek: Add support for various HP Laptops using CS35L41 HDA ALSA: hda/realtek - Support mute led function for HP platform ALSA: hda/realtek - Add new HP ZBook laptop with micmute led fixup ALSA: hda/realtek: Add support for HP Agusta using CS35L41 HDA Input: synaptics-rmi - fix crash with unsupported versions of F34 pmdomain: core: Introduce dev_pm_genpd_rpm_always_on() mmc: sdhci-of-dwcmshc: add PD workaround on RK3576 arm64: dts: qcom: x1e80100: Apply consistent critical thermal shutdown arm64: dts: qcom: x1e80100: Add GPU cooling pinctrl: samsung: refactor drvdata suspend & resume callbacks pinctrl: samsung: add dedicated SoC eint suspend/resume callbacks pinctrl: samsung: add gs101 specific eint suspend/resume callbacks dt-bindings: pwm: adi,axi-pwmgen: Increase #pwm-cells to 3 dt-bindings: pwm: Correct indentation and style in DTS example dt-bindings: pwm: adi,axi-pwmgen: Fix clocks serial: sh-sci: Move runtime PM enable to sci_probe_single() scsi: core: ufs: Fix a hang in the error handler Bluetooth: hci_core: fix list_for_each_entry_rcu usage Bluetooth: btintel_pcie: Fix driver not posting maximum rx buffers Bluetooth: btintel_pcie: Increase the tx and rx descriptor count Bluetooth: btintel_pcie: Reduce driver buffer posting to prevent race condition Bluetooth: MGMT: Fix UAF on mgmt_remove_adv_monitor_complete Bluetooth: MGMT: Remove unused mgmt_pending_find_data Bluetooth: MGMT: Protect mgmt_pending list with its own lock net: dsa: b53: fix untagged traffic sent via cpu tagged with VID 0 ptp: remove ptp->n_vclocks check logic in ptp_vclock_in_use() ath10k: snoc: fix unbalanced IRQ enable in crash recovery wifi: ath11k: convert timeouts to secs_to_jiffies() wifi: ath11k: avoid burning CPU in ath11k_debugfs_fw_stats_request() wifi: ath11k: don't use static variables in ath11k_debugfs_fw_stats_process() wifi: ath11k: don't wait when there is no vdev started wifi: ath11k: move some firmware stats related functions outside of debugfs wifi: ath11k: validate ath11k_crypto_mode on top of ath11k_core_qmi_firmware_ready wifi: ath12k: refactor ath12k_hw_regs structure wifi: ath12k: fix GCC_GCC_PCIE_HOT_RST definition for WCN7850 regulator: max20086: Fix refcount leak in max20086_parse_regulators_dt() spi: omap2-mcspi: Disable multi mode when CS should be kept asserted after message spi: omap2-mcspi: Disable multi-mode when the previous message kept CS asserted pinctrl: qcom: pinctrl-qcm2290: Add missing pins scsi: iscsi: Fix incorrect error path labels for flashnode operations net_sched: sch_sfq: fix a potential crash on gso_skb handling powerpc/powernv/memtrace: Fix out of bounds issue in memtrace mmap powerpc/vas: Return -EINVAL if the offset is non-zero in mmap() drm/meson: use unsigned long long / Hz for frequency types drm/meson: fix debug log statement when setting the HDMI clocks drm/meson: use vclk_freq instead of pixel_freq in debug print drm/meson: fix more rounding issues with 59.94Hz modes i40e: return false from i40e_reset_vf if reset is in progress i40e: retry VFLR handling if there is ongoing VF reset ACPI: CPPC: Fix NULL pointer dereference when nosmp is used net: Fix TOCTOU issue in sk_is_readable() macsec: MACsec SCI assignment for ES = 0 net/mdiobus: Fix potential out-of-bounds read/write access net/mdiobus: Fix potential out-of-bounds clause 45 read/write access Bluetooth: Fix NULL pointer deference on eir_get_service_data Bluetooth: hci_sync: Fix broadcast/PA when using an existing instance Bluetooth: eir: Fix possible crashes on eir_create_adv_data Bluetooth: MGMT: Fix sparse errors net/mlx5: Ensure fw pages are always allocated on same NUMA net/mlx5: Fix ECVF vports unload on shutdown flow net/mlx5: Fix return value when searching for existing flow group net/mlx5: HWS, fix missing ip_version handling in definer net/mlx5e: Fix leak of Geneve TLV option object net_sched: prio: fix a race in prio_tune() net_sched: red: fix a race in __red_change() net_sched: tbf: fix a race in tbf_change() net_sched: ets: fix a race in ets_qdisc_change() net: drv: netdevsim: don't napi_complete() from netpoll btrfs: exit after state insertion failure at btrfs_convert_extent_bit() fs/filesystems: Fix potential unsigned integer underflow in fs_name() gfs2: pass through holder from the VFS for freeze/thaw btrfs: exit after state split error at set_extent_bit() nvmet-fcloop: access fcpreq only when holding reqlock perf: Ensure bpf_perf_link path is properly serialized block: use q->elevator with ->elevator_lock held in elv_iosched_show() io_uring: fix use-after-free of sq->thread in __io_uring_show_fdinfo() block: don't use submit_bio_noacct_nocheck in blk_zone_wplug_bio_work io_uring: consistently use rcu semantics with sqpoll thread bio: Fix bio_first_folio() for SPARSEMEM without VMEMMAP block: Fix bvec_set_folio() for very large folios objtool/rust: relax slice condition to cover more `noreturn` Rust functions tools/resolve_btfids: Fix build when cross compiling kernel with clang. Revert "wifi: mwifiex: Fix HT40 bandwidth issue." ALSA: usb-audio: Add implicit feedback quirk for RODE AI-1 HID: usbhid: Eliminate recurrent out-of-bounds bug in usbhid_parse() posix-cpu-timers: fix race between handle_posix_cpu_timers() and posix_cpu_timer_del() nvmem: zynqmp_nvmem: unbreak driver after cleanup usb: usbtmc: Fix read_stb function and get_stb ioctl VMCI: fix race between vmci_host_setup_notify and vmci_ctx_unset_notify tty: serial: 8250_omap: fix TX with DMA for am33xx usb: misc: onboard_usb_dev: Fix usb5744 initialization sequence usb: cdnsp: Fix issue with detecting command completion event usb: cdnsp: Fix issue with detecting USB 3.2 speed usb: Flush altsetting 0 endpoints before reinitializating them after reset. usb: typec: tcpm/tcpci_maxim: Fix bounds check in process_rx() usb: typec: tcpm: move tcpm_queue_vdm_unlocked to asynchronous work 9p: Add a migrate_folio method ring-buffer: Do not trigger WARN_ON() due to a commit_overrun ring-buffer: Fix buffer locking in ring_buffer_subbuf_order_set() ring-buffer: Move cpus_read_lock() outside of buffer->mutex xfs: don't assume perags are initialised when trimming AGs xen/arm: call uaccess_ttbr0_enable for dm_op hypercall x86/iopl: Cure TIF_IO_BITMAP inconsistencies x86/fred/signal: Prevent immediate repeat of single step trap on return from SIGTRAP handler calipso: unlock rcu before returning -EAFNOSUPPORT regulator: dt-bindings: mt6357: Drop fixed compatible requirement usb: misc: onboard_usb_dev: fix build warning for CONFIG_USB_ONBOARD_DEV_USB5744=n net: usb: aqc111: debug info before sanitation overflow: Introduce __DEFINE_FLEX for having no initializer gfs2: Don't clear sb->s_fs_info in gfs2_sys_fs_add drm/meson: Use 1000ULL when operating with mode->clock thermal/drivers/mediatek/lvts: Remove unused lvts_debugfs_exit Linux 6.12.34 Change-Id: I679f0f1ddcf9bf8a0b86089ccb7b78536f5bc441 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
@@ -27,22 +27,31 @@ properties:
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maxItems: 1
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"#pwm-cells":
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const: 2
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const: 3
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clocks:
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maxItems: 1
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minItems: 1
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maxItems: 2
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clock-names:
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minItems: 1
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items:
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- const: axi
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- const: ext
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required:
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- reg
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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pwm@44b00000 {
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compatible = "adi,axi-pwmgen-2.00.a";
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reg = <0x44b00000 0x1000>;
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clocks = <&spi_clk>;
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#pwm-cells = <2>;
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compatible = "adi,axi-pwmgen-2.00.a";
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reg = <0x44b00000 0x1000>;
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clocks = <&fpga_clk>, <&spi_clk>;
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clock-names = "axi", "ext";
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#pwm-cells = <3>;
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};
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@@ -35,8 +35,8 @@ additionalProperties: false
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examples:
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- |
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pwm: pwm@f0408000 {
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compatible = "brcm,bcm7038-pwm";
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reg = <0xf0408000 0x28>;
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#pwm-cells = <2>;
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clocks = <&upg_fixed>;
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compatible = "brcm,bcm7038-pwm";
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reg = <0xf0408000 0x28>;
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#pwm-cells = <2>;
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clocks = <&upg_fixed>;
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};
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@@ -43,9 +43,9 @@ examples:
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#include <dt-bindings/clock/bcm281xx.h>
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pwm@3e01a000 {
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compatible = "brcm,bcm11351-pwm", "brcm,kona-pwm";
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reg = <0x3e01a000 0xcc>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_PWM>;
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#pwm-cells = <3>;
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compatible = "brcm,bcm11351-pwm", "brcm,kona-pwm";
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reg = <0x3e01a000 0xcc>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_PWM>;
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#pwm-cells = <3>;
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};
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...
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@@ -33,7 +33,7 @@ patternProperties:
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"^ldo-v(camio18|aud28|aux18|io18|io28|rf12|rf18|cn18|cn28|fe28)$":
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type: object
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$ref: fixed-regulator.yaml#
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$ref: regulator.yaml#
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unevaluatedProperties: false
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description:
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Properties for single fixed LDO regulator.
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@@ -112,7 +112,6 @@ examples:
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regulator-enable-ramp-delay = <220>;
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};
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mt6357_vfe28_reg: ldo-vfe28 {
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compatible = "regulator-fixed";
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regulator-name = "vfe28";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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@@ -125,14 +124,12 @@ examples:
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regulator-enable-ramp-delay = <110>;
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};
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mt6357_vrf18_reg: ldo-vrf18 {
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compatible = "regulator-fixed";
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regulator-name = "vrf18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-enable-ramp-delay = <110>;
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};
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mt6357_vrf12_reg: ldo-vrf12 {
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compatible = "regulator-fixed";
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regulator-name = "vrf12";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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@@ -157,14 +154,12 @@ examples:
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regulator-enable-ramp-delay = <264>;
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};
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mt6357_vcn28_reg: ldo-vcn28 {
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compatible = "regulator-fixed";
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regulator-name = "vcn28";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6357_vcn18_reg: ldo-vcn18 {
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compatible = "regulator-fixed";
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regulator-name = "vcn18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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@@ -183,7 +178,6 @@ examples:
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regulator-enable-ramp-delay = <264>;
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};
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mt6357_vcamio_reg: ldo-vcamio18 {
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compatible = "regulator-fixed";
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regulator-name = "vcamio";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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@@ -212,28 +206,24 @@ examples:
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regulator-always-on;
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};
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mt6357_vaux18_reg: ldo-vaux18 {
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compatible = "regulator-fixed";
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regulator-name = "vaux18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6357_vaud28_reg: ldo-vaud28 {
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compatible = "regulator-fixed";
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regulator-name = "vaud28";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6357_vio28_reg: ldo-vio28 {
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compatible = "regulator-fixed";
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regulator-name = "vio28";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6357_vio18_reg: ldo-vio18 {
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compatible = "regulator-fixed";
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regulator-name = "vio18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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@@ -16,6 +16,7 @@ DG2, etc is provided to prototype the driver.
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xe_migrate
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xe_cs
|
||||
xe_pm
|
||||
xe_gt_freq
|
||||
xe_pcode
|
||||
xe_gt_mcr
|
||||
xe_wa
|
||||
|
||||
14
Documentation/gpu/xe/xe_gt_freq.rst
Normal file
14
Documentation/gpu/xe/xe_gt_freq.rst
Normal file
@@ -0,0 +1,14 @@
|
||||
.. SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
==========================
|
||||
Xe GT Frequency Management
|
||||
==========================
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/xe/xe_gt_freq.c
|
||||
:doc: Xe GT Frequency Management
|
||||
|
||||
Internal API
|
||||
============
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/xe/xe_gt_freq.c
|
||||
:internal:
|
||||
2
Makefile
2
Makefile
@@ -1,7 +1,7 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
VERSION = 6
|
||||
PATCHLEVEL = 12
|
||||
SUBLEVEL = 33
|
||||
SUBLEVEL = 34
|
||||
EXTRAVERSION =
|
||||
NAME = Baby Opossum Posse
|
||||
|
||||
|
||||
@@ -20,6 +20,7 @@
|
||||
#include <dt-bindings/soc/qcom,gpr.h>
|
||||
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
|
||||
#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
/ {
|
||||
interrupt-parent = <&intc>;
|
||||
@@ -6414,8 +6415,8 @@
|
||||
};
|
||||
|
||||
aoss0-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -6440,7 +6441,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6466,7 +6467,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6492,7 +6493,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6518,7 +6519,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6544,7 +6545,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6570,7 +6571,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6596,7 +6597,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6622,7 +6623,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6640,8 +6641,8 @@
|
||||
};
|
||||
|
||||
cpuss2-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -6658,8 +6659,8 @@
|
||||
};
|
||||
|
||||
cpuss2-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -6676,7 +6677,7 @@
|
||||
};
|
||||
|
||||
mem-critical {
|
||||
temperature = <125000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6694,7 +6695,7 @@
|
||||
};
|
||||
|
||||
video-critical {
|
||||
temperature = <125000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6712,8 +6713,8 @@
|
||||
};
|
||||
|
||||
aoss0-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -6738,7 +6739,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6764,7 +6765,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6790,7 +6791,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6816,7 +6817,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6842,7 +6843,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6868,7 +6869,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6894,7 +6895,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6920,7 +6921,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -6938,8 +6939,8 @@
|
||||
};
|
||||
|
||||
cpuss2-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -6956,8 +6957,8 @@
|
||||
};
|
||||
|
||||
cpuss2-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -6974,8 +6975,8 @@
|
||||
};
|
||||
|
||||
aoss0-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -7000,7 +7001,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7026,7 +7027,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7052,7 +7053,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7078,7 +7079,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7104,7 +7105,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7130,7 +7131,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7156,7 +7157,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7182,7 +7183,7 @@
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7200,8 +7201,8 @@
|
||||
};
|
||||
|
||||
cpuss2-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -7218,8 +7219,8 @@
|
||||
};
|
||||
|
||||
cpuss2-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -7236,8 +7237,8 @@
|
||||
};
|
||||
|
||||
aoss0-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -7254,8 +7255,8 @@
|
||||
};
|
||||
|
||||
nsp0-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -7272,8 +7273,8 @@
|
||||
};
|
||||
|
||||
nsp1-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -7290,8 +7291,8 @@
|
||||
};
|
||||
|
||||
nsp2-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -7308,33 +7309,34 @@
|
||||
};
|
||||
|
||||
nsp3-critical {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpuss-0-thermal {
|
||||
polling-delay-passive = <10>;
|
||||
polling-delay-passive = <200>;
|
||||
|
||||
thermal-sensors = <&tsens3 5>;
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&gpuss0_alert0>;
|
||||
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
trips {
|
||||
trip-point0 {
|
||||
temperature = <85000>;
|
||||
gpuss0_alert0: trip-point0 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
trip-point1 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <1000>;
|
||||
type = "hot";
|
||||
};
|
||||
|
||||
trip-point2 {
|
||||
temperature = <125000>;
|
||||
gpu-critical {
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7342,25 +7344,26 @@
|
||||
};
|
||||
|
||||
gpuss-1-thermal {
|
||||
polling-delay-passive = <10>;
|
||||
polling-delay-passive = <200>;
|
||||
|
||||
thermal-sensors = <&tsens3 6>;
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&gpuss1_alert0>;
|
||||
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
trips {
|
||||
trip-point0 {
|
||||
temperature = <85000>;
|
||||
gpuss1_alert0: trip-point0 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
trip-point1 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <1000>;
|
||||
type = "hot";
|
||||
};
|
||||
|
||||
trip-point2 {
|
||||
temperature = <125000>;
|
||||
gpu-critical {
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7368,25 +7371,26 @@
|
||||
};
|
||||
|
||||
gpuss-2-thermal {
|
||||
polling-delay-passive = <10>;
|
||||
polling-delay-passive = <200>;
|
||||
|
||||
thermal-sensors = <&tsens3 7>;
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&gpuss2_alert0>;
|
||||
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
trips {
|
||||
trip-point0 {
|
||||
temperature = <85000>;
|
||||
gpuss2_alert0: trip-point0 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
trip-point1 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <1000>;
|
||||
type = "hot";
|
||||
};
|
||||
|
||||
trip-point2 {
|
||||
temperature = <125000>;
|
||||
gpu-critical {
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7394,25 +7398,26 @@
|
||||
};
|
||||
|
||||
gpuss-3-thermal {
|
||||
polling-delay-passive = <10>;
|
||||
polling-delay-passive = <200>;
|
||||
|
||||
thermal-sensors = <&tsens3 8>;
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&gpuss3_alert0>;
|
||||
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
trips {
|
||||
trip-point0 {
|
||||
temperature = <85000>;
|
||||
gpuss3_alert0: trip-point0 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
trip-point1 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <1000>;
|
||||
type = "hot";
|
||||
};
|
||||
|
||||
trip-point2 {
|
||||
temperature = <125000>;
|
||||
gpu-critical {
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7420,25 +7425,26 @@
|
||||
};
|
||||
|
||||
gpuss-4-thermal {
|
||||
polling-delay-passive = <10>;
|
||||
polling-delay-passive = <200>;
|
||||
|
||||
thermal-sensors = <&tsens3 9>;
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&gpuss4_alert0>;
|
||||
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
trips {
|
||||
trip-point0 {
|
||||
temperature = <85000>;
|
||||
gpuss4_alert0: trip-point0 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
trip-point1 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <1000>;
|
||||
type = "hot";
|
||||
};
|
||||
|
||||
trip-point2 {
|
||||
temperature = <125000>;
|
||||
gpu-critical {
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7446,25 +7452,26 @@
|
||||
};
|
||||
|
||||
gpuss-5-thermal {
|
||||
polling-delay-passive = <10>;
|
||||
polling-delay-passive = <200>;
|
||||
|
||||
thermal-sensors = <&tsens3 10>;
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&gpuss5_alert0>;
|
||||
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
trips {
|
||||
trip-point0 {
|
||||
temperature = <85000>;
|
||||
gpuss5_alert0: trip-point0 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
trip-point1 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <1000>;
|
||||
type = "hot";
|
||||
};
|
||||
|
||||
trip-point2 {
|
||||
temperature = <125000>;
|
||||
gpu-critical {
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7472,25 +7479,26 @@
|
||||
};
|
||||
|
||||
gpuss-6-thermal {
|
||||
polling-delay-passive = <10>;
|
||||
polling-delay-passive = <200>;
|
||||
|
||||
thermal-sensors = <&tsens3 11>;
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&gpuss6_alert0>;
|
||||
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
trips {
|
||||
trip-point0 {
|
||||
temperature = <85000>;
|
||||
gpuss6_alert0: trip-point0 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
trip-point1 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <1000>;
|
||||
type = "hot";
|
||||
};
|
||||
|
||||
trip-point2 {
|
||||
temperature = <125000>;
|
||||
gpu-critical {
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7498,25 +7506,26 @@
|
||||
};
|
||||
|
||||
gpuss-7-thermal {
|
||||
polling-delay-passive = <10>;
|
||||
polling-delay-passive = <200>;
|
||||
|
||||
thermal-sensors = <&tsens3 12>;
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&gpuss7_alert0>;
|
||||
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
trips {
|
||||
trip-point0 {
|
||||
temperature = <85000>;
|
||||
gpuss7_alert0: trip-point0 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
trip-point1 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <1000>;
|
||||
type = "hot";
|
||||
};
|
||||
|
||||
trip-point2 {
|
||||
temperature = <125000>;
|
||||
gpu-critical {
|
||||
temperature = <115000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -7535,7 +7544,7 @@
|
||||
|
||||
camera0-critical {
|
||||
temperature = <115000>;
|
||||
hysteresis = <0>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
@@ -7553,7 +7562,7 @@
|
||||
|
||||
camera0-critical {
|
||||
temperature = <115000>;
|
||||
hysteresis = <0>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -83,7 +83,26 @@ HYPERCALL3(vcpu_op);
|
||||
HYPERCALL1(platform_op_raw);
|
||||
HYPERCALL2(multicall);
|
||||
HYPERCALL2(vm_assist);
|
||||
HYPERCALL3(dm_op);
|
||||
|
||||
SYM_FUNC_START(HYPERVISOR_dm_op)
|
||||
mov x16, #__HYPERVISOR_dm_op; \
|
||||
/*
|
||||
* dm_op hypercalls are issued by the userspace. The kernel needs to
|
||||
* enable access to TTBR0_EL1 as the hypervisor would issue stage 1
|
||||
* translations to user memory via AT instructions. Since AT
|
||||
* instructions are not affected by the PAN bit (ARMv8.1), we only
|
||||
* need the explicit uaccess_enable/disable if the TTBR0 PAN emulation
|
||||
* is enabled (it implies that hardware UAO and PAN disabled).
|
||||
*/
|
||||
uaccess_ttbr0_enable x6, x7, x8
|
||||
hvc XEN_IMM
|
||||
|
||||
/*
|
||||
* Disable userspace access from kernel once the hyp call completed.
|
||||
*/
|
||||
uaccess_ttbr0_disable x6, x7
|
||||
ret
|
||||
SYM_FUNC_END(HYPERVISOR_dm_op);
|
||||
|
||||
SYM_FUNC_START(privcmd_call)
|
||||
mov x16, x0
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
compatible = "loongson,pch-msi-1.0";
|
||||
reg = <0 0x2ff00000 0 0x8>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
msi-controller;
|
||||
loongson,msi-base-vec = <64>;
|
||||
loongson,msi-num-vecs = <64>;
|
||||
|
||||
@@ -521,6 +521,15 @@ static int coproc_mmap(struct file *fp, struct vm_area_struct *vma)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Map complete page to the paste address. So the user
|
||||
* space should pass 0ULL to the offset parameter.
|
||||
*/
|
||||
if (vma->vm_pgoff) {
|
||||
pr_debug("Page offset unsupported to map paste address\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Ensure instance has an open send window */
|
||||
if (!txwin) {
|
||||
pr_err("No send window open?\n");
|
||||
|
||||
@@ -48,11 +48,15 @@ static ssize_t memtrace_read(struct file *filp, char __user *ubuf,
|
||||
static int memtrace_mmap(struct file *filp, struct vm_area_struct *vma)
|
||||
{
|
||||
struct memtrace_entry *ent = filp->private_data;
|
||||
unsigned long ent_nrpages = ent->size >> PAGE_SHIFT;
|
||||
unsigned long vma_nrpages = vma_pages(vma);
|
||||
|
||||
if (ent->size < vma->vm_end - vma->vm_start)
|
||||
/* The requested page offset should be within object's page count */
|
||||
if (vma->vm_pgoff >= ent_nrpages)
|
||||
return -EINVAL;
|
||||
|
||||
if (vma->vm_pgoff << PAGE_SHIFT >= ent->size)
|
||||
/* The requested mapping range should remain within the bounds */
|
||||
if (vma_nrpages > ent_nrpages - vma->vm_pgoff)
|
||||
return -EINVAL;
|
||||
|
||||
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
|
||||
|
||||
@@ -429,7 +429,7 @@ int handle_misaligned_load(struct pt_regs *regs)
|
||||
|
||||
val.data_u64 = 0;
|
||||
if (user_mode(regs)) {
|
||||
if (copy_from_user(&val, (u8 __user *)addr, len))
|
||||
if (copy_from_user_nofault(&val, (u8 __user *)addr, len))
|
||||
return -1;
|
||||
} else {
|
||||
memcpy(&val, (u8 *)addr, len);
|
||||
@@ -530,7 +530,7 @@ int handle_misaligned_store(struct pt_regs *regs)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
if (user_mode(regs)) {
|
||||
if (copy_to_user((u8 __user *)addr, &val, len))
|
||||
if (copy_to_user_nofault((u8 __user *)addr, &val, len))
|
||||
return -1;
|
||||
} else {
|
||||
memcpy((u8 *)addr, &val, len);
|
||||
|
||||
@@ -24,4 +24,26 @@ int ia32_setup_rt_frame(struct ksignal *ksig, struct pt_regs *regs);
|
||||
int x64_setup_rt_frame(struct ksignal *ksig, struct pt_regs *regs);
|
||||
int x32_setup_rt_frame(struct ksignal *ksig, struct pt_regs *regs);
|
||||
|
||||
/*
|
||||
* To prevent immediate repeat of single step trap on return from SIGTRAP
|
||||
* handler if the trap flag (TF) is set without an external debugger attached,
|
||||
* clear the software event flag in the augmented SS, ensuring no single-step
|
||||
* trap is pending upon ERETU completion.
|
||||
*
|
||||
* Note, this function should be called in sigreturn() before the original
|
||||
* state is restored to make sure the TF is read from the entry frame.
|
||||
*/
|
||||
static __always_inline void prevent_single_step_upon_eretu(struct pt_regs *regs)
|
||||
{
|
||||
/*
|
||||
* If the trap flag (TF) is set, i.e., the sigreturn() SYSCALL instruction
|
||||
* is being single-stepped, do not clear the software event flag in the
|
||||
* augmented SS, thus a debugger won't skip over the following instruction.
|
||||
*/
|
||||
#ifdef CONFIG_X86_FRED
|
||||
if (!(regs->flags & X86_EFLAGS_TF))
|
||||
regs->fred_ss.swevent = 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* _ASM_X86_SIGHANDLING_H */
|
||||
|
||||
@@ -33,8 +33,9 @@ void io_bitmap_share(struct task_struct *tsk)
|
||||
set_tsk_thread_flag(tsk, TIF_IO_BITMAP);
|
||||
}
|
||||
|
||||
static void task_update_io_bitmap(struct task_struct *tsk)
|
||||
static void task_update_io_bitmap(void)
|
||||
{
|
||||
struct task_struct *tsk = current;
|
||||
struct thread_struct *t = &tsk->thread;
|
||||
|
||||
if (t->iopl_emul == 3 || t->io_bitmap) {
|
||||
@@ -54,7 +55,12 @@ void io_bitmap_exit(struct task_struct *tsk)
|
||||
struct io_bitmap *iobm = tsk->thread.io_bitmap;
|
||||
|
||||
tsk->thread.io_bitmap = NULL;
|
||||
task_update_io_bitmap(tsk);
|
||||
/*
|
||||
* Don't touch the TSS when invoked on a failed fork(). TSS
|
||||
* reflects the state of @current and not the state of @tsk.
|
||||
*/
|
||||
if (tsk == current)
|
||||
task_update_io_bitmap();
|
||||
if (iobm && refcount_dec_and_test(&iobm->refcnt))
|
||||
kfree(iobm);
|
||||
}
|
||||
@@ -192,8 +198,7 @@ SYSCALL_DEFINE1(iopl, unsigned int, level)
|
||||
}
|
||||
|
||||
t->iopl_emul = level;
|
||||
task_update_io_bitmap(current);
|
||||
|
||||
task_update_io_bitmap();
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -181,6 +181,7 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)
|
||||
frame->ret_addr = (unsigned long) ret_from_fork_asm;
|
||||
p->thread.sp = (unsigned long) fork_frame;
|
||||
p->thread.io_bitmap = NULL;
|
||||
clear_tsk_thread_flag(p, TIF_IO_BITMAP);
|
||||
p->thread.iopl_warn = 0;
|
||||
memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
|
||||
|
||||
@@ -469,6 +470,11 @@ void native_tss_update_io_bitmap(void)
|
||||
} else {
|
||||
struct io_bitmap *iobm = t->io_bitmap;
|
||||
|
||||
if (WARN_ON_ONCE(!iobm)) {
|
||||
clear_thread_flag(TIF_IO_BITMAP);
|
||||
native_tss_invalidate_io_bitmap();
|
||||
}
|
||||
|
||||
/*
|
||||
* Only copy bitmap data when the sequence number differs. The
|
||||
* update time is accounted to the incoming task.
|
||||
|
||||
@@ -152,6 +152,8 @@ SYSCALL32_DEFINE0(sigreturn)
|
||||
struct sigframe_ia32 __user *frame = (struct sigframe_ia32 __user *)(regs->sp-8);
|
||||
sigset_t set;
|
||||
|
||||
prevent_single_step_upon_eretu(regs);
|
||||
|
||||
if (!access_ok(frame, sizeof(*frame)))
|
||||
goto badframe;
|
||||
if (__get_user(set.sig[0], &frame->sc.oldmask)
|
||||
@@ -175,6 +177,8 @@ SYSCALL32_DEFINE0(rt_sigreturn)
|
||||
struct rt_sigframe_ia32 __user *frame;
|
||||
sigset_t set;
|
||||
|
||||
prevent_single_step_upon_eretu(regs);
|
||||
|
||||
frame = (struct rt_sigframe_ia32 __user *)(regs->sp - 4);
|
||||
|
||||
if (!access_ok(frame, sizeof(*frame)))
|
||||
|
||||
@@ -250,6 +250,8 @@ SYSCALL_DEFINE0(rt_sigreturn)
|
||||
sigset_t set;
|
||||
unsigned long uc_flags;
|
||||
|
||||
prevent_single_step_upon_eretu(regs);
|
||||
|
||||
frame = (struct rt_sigframe __user *)(regs->sp - sizeof(long));
|
||||
if (!access_ok(frame, sizeof(*frame)))
|
||||
goto badframe;
|
||||
@@ -366,6 +368,8 @@ COMPAT_SYSCALL_DEFINE0(x32_rt_sigreturn)
|
||||
sigset_t set;
|
||||
unsigned long uc_flags;
|
||||
|
||||
prevent_single_step_upon_eretu(regs);
|
||||
|
||||
frame = (struct rt_sigframe_x32 __user *)(regs->sp - 8);
|
||||
|
||||
if (!access_ok(frame, sizeof(*frame)))
|
||||
|
||||
@@ -749,7 +749,6 @@ ssize_t elv_iosched_store(struct gendisk *disk, const char *buf,
|
||||
ssize_t elv_iosched_show(struct gendisk *disk, char *name)
|
||||
{
|
||||
struct request_queue *q = disk->queue;
|
||||
struct elevator_queue *eq = q->elevator;
|
||||
struct elevator_type *cur = NULL, *e;
|
||||
int len = 0;
|
||||
|
||||
@@ -760,7 +759,7 @@ ssize_t elv_iosched_show(struct gendisk *disk, char *name)
|
||||
len += sprintf(name+len, "[none] ");
|
||||
} else {
|
||||
len += sprintf(name+len, "none ");
|
||||
cur = eq->type;
|
||||
cur = q->elevator->type;
|
||||
}
|
||||
|
||||
spin_lock(&elv_list_lock);
|
||||
|
||||
@@ -463,7 +463,7 @@ bool cppc_allow_fast_switch(void)
|
||||
struct cpc_desc *cpc_ptr;
|
||||
int cpu;
|
||||
|
||||
for_each_possible_cpu(cpu) {
|
||||
for_each_present_cpu(cpu) {
|
||||
cpc_ptr = per_cpu(cpc_desc_ptr, cpu);
|
||||
desired_reg = &cpc_ptr->cpc_regs[DESIRED_PERF];
|
||||
if (!CPC_IN_SYSTEM_MEMORY(desired_reg) &&
|
||||
|
||||
@@ -923,6 +923,8 @@ static void device_resume(struct device *dev, pm_message_t state, bool async)
|
||||
if (!dev->power.is_suspended)
|
||||
goto Complete;
|
||||
|
||||
dev->power.is_suspended = false;
|
||||
|
||||
if (dev->power.direct_complete) {
|
||||
/* Match the pm_runtime_disable() in __device_suspend(). */
|
||||
pm_runtime_enable(dev);
|
||||
@@ -978,7 +980,6 @@ static void device_resume(struct device *dev, pm_message_t state, bool async)
|
||||
|
||||
End:
|
||||
error = dpm_run_callback(callback, dev, state, info);
|
||||
dev->power.is_suspended = false;
|
||||
|
||||
device_unlock(dev);
|
||||
dpm_watchdog_clear(&wd);
|
||||
|
||||
@@ -330,11 +330,14 @@ end_io:
|
||||
static void lo_rw_aio_do_completion(struct loop_cmd *cmd)
|
||||
{
|
||||
struct request *rq = blk_mq_rq_from_pdu(cmd);
|
||||
struct loop_device *lo = rq->q->queuedata;
|
||||
|
||||
if (!atomic_dec_and_test(&cmd->ref))
|
||||
return;
|
||||
kfree(cmd->bvec);
|
||||
cmd->bvec = NULL;
|
||||
if (req_op(rq) == REQ_OP_WRITE)
|
||||
file_end_write(lo->lo_backing_file);
|
||||
if (likely(!blk_should_fake_timeout(rq->q)))
|
||||
blk_mq_complete_request(rq);
|
||||
}
|
||||
@@ -409,9 +412,10 @@ static int lo_rw_aio(struct loop_device *lo, struct loop_cmd *cmd,
|
||||
cmd->iocb.ki_flags = 0;
|
||||
}
|
||||
|
||||
if (rw == ITER_SOURCE)
|
||||
if (rw == ITER_SOURCE) {
|
||||
file_start_write(lo->lo_backing_file);
|
||||
ret = file->f_op->write_iter(&cmd->iocb, &iter);
|
||||
else
|
||||
} else
|
||||
ret = file->f_op->read_iter(&cmd->iocb, &iter);
|
||||
|
||||
lo_rw_aio_do_completion(cmd);
|
||||
|
||||
@@ -231,8 +231,13 @@ static int btintel_pcie_submit_rx(struct btintel_pcie_data *data)
|
||||
static int btintel_pcie_start_rx(struct btintel_pcie_data *data)
|
||||
{
|
||||
int i, ret;
|
||||
struct rxq *rxq = &data->rxq;
|
||||
|
||||
for (i = 0; i < BTINTEL_PCIE_RX_MAX_QUEUE; i++) {
|
||||
/* Post (BTINTEL_PCIE_RX_DESCS_COUNT - 3) buffers to overcome the
|
||||
* hardware issues leading to race condition at the firmware.
|
||||
*/
|
||||
|
||||
for (i = 0; i < rxq->count - 3; i++) {
|
||||
ret = btintel_pcie_submit_rx(data);
|
||||
if (ret)
|
||||
return ret;
|
||||
@@ -1147,8 +1152,8 @@ static int btintel_pcie_alloc(struct btintel_pcie_data *data)
|
||||
* + size of index * Number of queues(2) * type of index array(4)
|
||||
* + size of context information
|
||||
*/
|
||||
total = (sizeof(struct tfd) + sizeof(struct urbd0) + sizeof(struct frbd)
|
||||
+ sizeof(struct urbd1)) * BTINTEL_DESCS_COUNT;
|
||||
total = (sizeof(struct tfd) + sizeof(struct urbd0)) * BTINTEL_PCIE_TX_DESCS_COUNT;
|
||||
total += (sizeof(struct frbd) + sizeof(struct urbd1)) * BTINTEL_PCIE_RX_DESCS_COUNT;
|
||||
|
||||
/* Add the sum of size of index array and size of ci struct */
|
||||
total += (sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 4) + sizeof(struct ctx_info);
|
||||
@@ -1173,36 +1178,36 @@ static int btintel_pcie_alloc(struct btintel_pcie_data *data)
|
||||
data->dma_v_addr = v_addr;
|
||||
|
||||
/* Setup descriptor count */
|
||||
data->txq.count = BTINTEL_DESCS_COUNT;
|
||||
data->rxq.count = BTINTEL_DESCS_COUNT;
|
||||
data->txq.count = BTINTEL_PCIE_TX_DESCS_COUNT;
|
||||
data->rxq.count = BTINTEL_PCIE_RX_DESCS_COUNT;
|
||||
|
||||
/* Setup tfds */
|
||||
data->txq.tfds_p_addr = p_addr;
|
||||
data->txq.tfds = v_addr;
|
||||
|
||||
p_addr += (sizeof(struct tfd) * BTINTEL_DESCS_COUNT);
|
||||
v_addr += (sizeof(struct tfd) * BTINTEL_DESCS_COUNT);
|
||||
p_addr += (sizeof(struct tfd) * BTINTEL_PCIE_TX_DESCS_COUNT);
|
||||
v_addr += (sizeof(struct tfd) * BTINTEL_PCIE_TX_DESCS_COUNT);
|
||||
|
||||
/* Setup urbd0 */
|
||||
data->txq.urbd0s_p_addr = p_addr;
|
||||
data->txq.urbd0s = v_addr;
|
||||
|
||||
p_addr += (sizeof(struct urbd0) * BTINTEL_DESCS_COUNT);
|
||||
v_addr += (sizeof(struct urbd0) * BTINTEL_DESCS_COUNT);
|
||||
p_addr += (sizeof(struct urbd0) * BTINTEL_PCIE_TX_DESCS_COUNT);
|
||||
v_addr += (sizeof(struct urbd0) * BTINTEL_PCIE_TX_DESCS_COUNT);
|
||||
|
||||
/* Setup FRBD*/
|
||||
data->rxq.frbds_p_addr = p_addr;
|
||||
data->rxq.frbds = v_addr;
|
||||
|
||||
p_addr += (sizeof(struct frbd) * BTINTEL_DESCS_COUNT);
|
||||
v_addr += (sizeof(struct frbd) * BTINTEL_DESCS_COUNT);
|
||||
p_addr += (sizeof(struct frbd) * BTINTEL_PCIE_RX_DESCS_COUNT);
|
||||
v_addr += (sizeof(struct frbd) * BTINTEL_PCIE_RX_DESCS_COUNT);
|
||||
|
||||
/* Setup urbd1 */
|
||||
data->rxq.urbd1s_p_addr = p_addr;
|
||||
data->rxq.urbd1s = v_addr;
|
||||
|
||||
p_addr += (sizeof(struct urbd1) * BTINTEL_DESCS_COUNT);
|
||||
v_addr += (sizeof(struct urbd1) * BTINTEL_DESCS_COUNT);
|
||||
p_addr += (sizeof(struct urbd1) * BTINTEL_PCIE_RX_DESCS_COUNT);
|
||||
v_addr += (sizeof(struct urbd1) * BTINTEL_PCIE_RX_DESCS_COUNT);
|
||||
|
||||
/* Setup data buffers for txq */
|
||||
err = btintel_pcie_setup_txq_bufs(data, &data->txq);
|
||||
|
||||
@@ -81,8 +81,11 @@ enum {
|
||||
/* Default interrupt timeout in msec */
|
||||
#define BTINTEL_DEFAULT_INTR_TIMEOUT_MS 3000
|
||||
|
||||
/* The number of descriptors in TX/RX queues */
|
||||
#define BTINTEL_DESCS_COUNT 16
|
||||
/* The number of descriptors in TX queues */
|
||||
#define BTINTEL_PCIE_TX_DESCS_COUNT 32
|
||||
|
||||
/* The number of descriptors in RX queues */
|
||||
#define BTINTEL_PCIE_RX_DESCS_COUNT 64
|
||||
|
||||
/* Number of Queue for TX and RX
|
||||
* It indicates the index of the IA(Index Array)
|
||||
@@ -104,9 +107,6 @@ enum {
|
||||
/* Doorbell vector for TFD */
|
||||
#define BTINTEL_PCIE_TX_DB_VEC 0
|
||||
|
||||
/* Number of pending RX requests for downlink */
|
||||
#define BTINTEL_PCIE_RX_MAX_QUEUE 6
|
||||
|
||||
/* Doorbell vector for FRBD */
|
||||
#define BTINTEL_PCIE_RX_DB_VEC 513
|
||||
|
||||
|
||||
@@ -3,12 +3,14 @@
|
||||
* Copyright (c) 2021 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
|
||||
*/
|
||||
|
||||
#include <linux/cleanup.h>
|
||||
#include <linux/counter.h>
|
||||
#include <linux/gpio/consumer.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
@@ -19,6 +21,7 @@ struct interrupt_cnt_priv {
|
||||
struct gpio_desc *gpio;
|
||||
int irq;
|
||||
bool enabled;
|
||||
struct mutex lock;
|
||||
struct counter_signal signals;
|
||||
struct counter_synapse synapses;
|
||||
struct counter_count cnts;
|
||||
@@ -41,6 +44,8 @@ static int interrupt_cnt_enable_read(struct counter_device *counter,
|
||||
{
|
||||
struct interrupt_cnt_priv *priv = counter_priv(counter);
|
||||
|
||||
guard(mutex)(&priv->lock);
|
||||
|
||||
*enable = priv->enabled;
|
||||
|
||||
return 0;
|
||||
@@ -51,6 +56,8 @@ static int interrupt_cnt_enable_write(struct counter_device *counter,
|
||||
{
|
||||
struct interrupt_cnt_priv *priv = counter_priv(counter);
|
||||
|
||||
guard(mutex)(&priv->lock);
|
||||
|
||||
if (priv->enabled == enable)
|
||||
return 0;
|
||||
|
||||
@@ -227,6 +234,8 @@ static int interrupt_cnt_probe(struct platform_device *pdev)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
mutex_init(&priv->lock);
|
||||
|
||||
ret = devm_counter_add(dev, counter);
|
||||
if (ret < 0)
|
||||
return dev_err_probe(dev, ret, "Failed to add counter\n");
|
||||
|
||||
@@ -5572,7 +5572,8 @@ static int udma_probe(struct platform_device *pdev)
|
||||
uc->config.dir = DMA_MEM_TO_MEM;
|
||||
uc->name = devm_kasprintf(dev, GFP_KERNEL, "%s chan%d",
|
||||
dev_name(dev), i);
|
||||
|
||||
if (!uc->name)
|
||||
return -ENOMEM;
|
||||
vchan_init(&uc->vc, &ud->ddev);
|
||||
/* Use custom vchan completion handling */
|
||||
tasklet_setup(&uc->vc.task, udma_vchan_complete);
|
||||
|
||||
@@ -263,6 +263,7 @@ static void fpga_mgr_test_img_load_sgt(struct kunit *test)
|
||||
img_buf = init_test_buffer(test, IMAGE_SIZE);
|
||||
|
||||
sgt = kunit_kzalloc(test, sizeof(*sgt), GFP_KERNEL);
|
||||
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sgt);
|
||||
ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
|
||||
KUNIT_ASSERT_EQ(test, ret, 0);
|
||||
sg_init_one(sgt->sgl, img_buf, IMAGE_SIZE);
|
||||
|
||||
@@ -314,8 +314,8 @@
|
||||
#define PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION_MASK REG_GENMASK(20, 16)
|
||||
#define PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(val) REG_FIELD_PREP(PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION_MASK, val)
|
||||
#define PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION_MASK REG_GENMASK(12, 8)
|
||||
#define PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(val) REG_FIELD_PREP(PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION_MASK, val)
|
||||
#define PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(val) REG_FIELD_PREP(PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION_MASK, val)
|
||||
#define PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION_MASK REG_GENMASK(4, 0)
|
||||
#define PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(val) REG_FIELD_PREP(PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION_MASK, val)
|
||||
#define PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(val) REG_FIELD_PREP(PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION_MASK, val)
|
||||
|
||||
#endif /* __INTEL_PSR_REGS_H__ */
|
||||
|
||||
@@ -633,7 +633,7 @@ static int guc_submission_send_busy_loop(struct intel_guc *guc,
|
||||
atomic_inc(&guc->outstanding_submission_g2h);
|
||||
|
||||
ret = intel_guc_send_busy_loop(guc, action, len, g2h_len_dw, loop);
|
||||
if (ret)
|
||||
if (ret && g2h_len_dw)
|
||||
atomic_dec(&guc->outstanding_submission_g2h);
|
||||
|
||||
return ret;
|
||||
@@ -3422,18 +3422,29 @@ static inline int guc_lrc_desc_unpin(struct intel_context *ce)
|
||||
* GuC is active, lets destroy this context, but at this point we can still be racing
|
||||
* with suspend, so we undo everything if the H2G fails in deregister_context so
|
||||
* that GuC reset will find this context during clean up.
|
||||
*
|
||||
* There is a race condition where the reset code could have altered
|
||||
* this context's state and done a wakeref put before we try to
|
||||
* deregister it here. So check if the context is still set to be
|
||||
* destroyed before undoing earlier changes, to avoid two wakeref puts
|
||||
* on the same context.
|
||||
*/
|
||||
ret = deregister_context(ce, ce->guc_id.id);
|
||||
if (ret) {
|
||||
bool pending_destroyed;
|
||||
spin_lock_irqsave(&ce->guc_state.lock, flags);
|
||||
set_context_registered(ce);
|
||||
clr_context_destroyed(ce);
|
||||
pending_destroyed = context_destroyed(ce);
|
||||
if (pending_destroyed) {
|
||||
set_context_registered(ce);
|
||||
clr_context_destroyed(ce);
|
||||
}
|
||||
spin_unlock_irqrestore(&ce->guc_state.lock, flags);
|
||||
/*
|
||||
* As gt-pm is awake at function entry, intel_wakeref_put_async merely decrements
|
||||
* the wakeref immediately but per function spec usage call this after unlock.
|
||||
*/
|
||||
intel_wakeref_put_async(>->wakeref);
|
||||
if (pending_destroyed)
|
||||
intel_wakeref_put_async(>->wakeref);
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
||||
@@ -168,7 +168,7 @@ static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
|
||||
/* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
|
||||
{
|
||||
.limits = {
|
||||
.max_hdmi_phy_freq = 1650000,
|
||||
.max_hdmi_phy_freq = 1650000000,
|
||||
},
|
||||
.attrs = (const struct soc_device_attribute []) {
|
||||
{ .soc_id = "GXL (S805*)", },
|
||||
|
||||
@@ -37,7 +37,7 @@ struct meson_drm_match_data {
|
||||
};
|
||||
|
||||
struct meson_drm_soc_limits {
|
||||
unsigned int max_hdmi_phy_freq;
|
||||
unsigned long long max_hdmi_phy_freq;
|
||||
};
|
||||
|
||||
struct meson_drm {
|
||||
|
||||
@@ -70,12 +70,12 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
|
||||
{
|
||||
struct meson_drm *priv = encoder_hdmi->priv;
|
||||
int vic = drm_match_cea_mode(mode);
|
||||
unsigned int phy_freq;
|
||||
unsigned int vclk_freq;
|
||||
unsigned int venc_freq;
|
||||
unsigned int hdmi_freq;
|
||||
unsigned long long phy_freq;
|
||||
unsigned long long vclk_freq;
|
||||
unsigned long long venc_freq;
|
||||
unsigned long long hdmi_freq;
|
||||
|
||||
vclk_freq = mode->clock;
|
||||
vclk_freq = mode->clock * 1000ULL;
|
||||
|
||||
/* For 420, pixel clock is half unlike venc clock */
|
||||
if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
|
||||
@@ -107,7 +107,8 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
|
||||
venc_freq /= 2;
|
||||
|
||||
dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
|
||||
dev_dbg(priv->dev,
|
||||
"phy:%lluHz vclk=%lluHz venc=%lluHz hdmi=%lluHz enci=%d\n",
|
||||
phy_freq, vclk_freq, venc_freq, hdmi_freq,
|
||||
priv->venc.hdmi_use_enci);
|
||||
|
||||
@@ -122,10 +123,11 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
|
||||
struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
|
||||
struct meson_drm *priv = encoder_hdmi->priv;
|
||||
bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
|
||||
unsigned int phy_freq;
|
||||
unsigned int vclk_freq;
|
||||
unsigned int venc_freq;
|
||||
unsigned int hdmi_freq;
|
||||
unsigned long long clock = mode->clock * 1000ULL;
|
||||
unsigned long long phy_freq;
|
||||
unsigned long long vclk_freq;
|
||||
unsigned long long venc_freq;
|
||||
unsigned long long hdmi_freq;
|
||||
int vic = drm_match_cea_mode(mode);
|
||||
enum drm_mode_status status;
|
||||
|
||||
@@ -144,12 +146,12 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
|
||||
if (status != MODE_OK)
|
||||
return status;
|
||||
|
||||
return meson_vclk_dmt_supported_freq(priv, mode->clock);
|
||||
return meson_vclk_dmt_supported_freq(priv, clock);
|
||||
/* Check against supported VIC modes */
|
||||
} else if (!meson_venc_hdmi_supported_vic(vic))
|
||||
return MODE_BAD;
|
||||
|
||||
vclk_freq = mode->clock;
|
||||
vclk_freq = clock;
|
||||
|
||||
/* For 420, pixel clock is half unlike venc clock */
|
||||
if (drm_mode_is_420_only(display_info, mode) ||
|
||||
@@ -179,7 +181,8 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
|
||||
venc_freq /= 2;
|
||||
|
||||
dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
|
||||
dev_dbg(priv->dev,
|
||||
"%s: vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz\n",
|
||||
__func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
|
||||
|
||||
return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
|
||||
|
||||
@@ -110,7 +110,7 @@
|
||||
#define HDMI_PLL_LOCK BIT(31)
|
||||
#define HDMI_PLL_LOCK_G12A (3 << 30)
|
||||
|
||||
#define FREQ_1000_1001(_freq) DIV_ROUND_CLOSEST(_freq * 1000, 1001)
|
||||
#define FREQ_1000_1001(_freq) DIV_ROUND_CLOSEST_ULL((_freq) * 1000ULL, 1001ULL)
|
||||
|
||||
/* VID PLL Dividers */
|
||||
enum {
|
||||
@@ -360,11 +360,11 @@ enum {
|
||||
};
|
||||
|
||||
struct meson_vclk_params {
|
||||
unsigned int pll_freq;
|
||||
unsigned int phy_freq;
|
||||
unsigned int vclk_freq;
|
||||
unsigned int venc_freq;
|
||||
unsigned int pixel_freq;
|
||||
unsigned long long pll_freq;
|
||||
unsigned long long phy_freq;
|
||||
unsigned long long vclk_freq;
|
||||
unsigned long long venc_freq;
|
||||
unsigned long long pixel_freq;
|
||||
unsigned int pll_od1;
|
||||
unsigned int pll_od2;
|
||||
unsigned int pll_od3;
|
||||
@@ -372,11 +372,11 @@ struct meson_vclk_params {
|
||||
unsigned int vclk_div;
|
||||
} params[] = {
|
||||
[MESON_VCLK_HDMI_ENCI_54000] = {
|
||||
.pll_freq = 4320000,
|
||||
.phy_freq = 270000,
|
||||
.vclk_freq = 54000,
|
||||
.venc_freq = 54000,
|
||||
.pixel_freq = 54000,
|
||||
.pll_freq = 4320000000,
|
||||
.phy_freq = 270000000,
|
||||
.vclk_freq = 54000000,
|
||||
.venc_freq = 54000000,
|
||||
.pixel_freq = 54000000,
|
||||
.pll_od1 = 4,
|
||||
.pll_od2 = 4,
|
||||
.pll_od3 = 1,
|
||||
@@ -384,11 +384,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_DDR_54000] = {
|
||||
.pll_freq = 4320000,
|
||||
.phy_freq = 270000,
|
||||
.vclk_freq = 54000,
|
||||
.venc_freq = 54000,
|
||||
.pixel_freq = 27000,
|
||||
.pll_freq = 4320000000,
|
||||
.phy_freq = 270000000,
|
||||
.vclk_freq = 54000000,
|
||||
.venc_freq = 54000000,
|
||||
.pixel_freq = 27000000,
|
||||
.pll_od1 = 4,
|
||||
.pll_od2 = 4,
|
||||
.pll_od3 = 1,
|
||||
@@ -396,11 +396,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_DDR_148500] = {
|
||||
.pll_freq = 2970000,
|
||||
.phy_freq = 742500,
|
||||
.vclk_freq = 148500,
|
||||
.venc_freq = 148500,
|
||||
.pixel_freq = 74250,
|
||||
.pll_freq = 2970000000,
|
||||
.phy_freq = 742500000,
|
||||
.vclk_freq = 148500000,
|
||||
.venc_freq = 148500000,
|
||||
.pixel_freq = 74250000,
|
||||
.pll_od1 = 4,
|
||||
.pll_od2 = 1,
|
||||
.pll_od3 = 1,
|
||||
@@ -408,11 +408,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_74250] = {
|
||||
.pll_freq = 2970000,
|
||||
.phy_freq = 742500,
|
||||
.vclk_freq = 74250,
|
||||
.venc_freq = 74250,
|
||||
.pixel_freq = 74250,
|
||||
.pll_freq = 2970000000,
|
||||
.phy_freq = 742500000,
|
||||
.vclk_freq = 74250000,
|
||||
.venc_freq = 74250000,
|
||||
.pixel_freq = 74250000,
|
||||
.pll_od1 = 2,
|
||||
.pll_od2 = 2,
|
||||
.pll_od3 = 2,
|
||||
@@ -420,11 +420,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_148500] = {
|
||||
.pll_freq = 2970000,
|
||||
.phy_freq = 1485000,
|
||||
.vclk_freq = 148500,
|
||||
.venc_freq = 148500,
|
||||
.pixel_freq = 148500,
|
||||
.pll_freq = 2970000000,
|
||||
.phy_freq = 1485000000,
|
||||
.vclk_freq = 148500000,
|
||||
.venc_freq = 148500000,
|
||||
.pixel_freq = 148500000,
|
||||
.pll_od1 = 1,
|
||||
.pll_od2 = 2,
|
||||
.pll_od3 = 2,
|
||||
@@ -432,11 +432,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_297000] = {
|
||||
.pll_freq = 5940000,
|
||||
.phy_freq = 2970000,
|
||||
.venc_freq = 297000,
|
||||
.vclk_freq = 297000,
|
||||
.pixel_freq = 297000,
|
||||
.pll_freq = 5940000000,
|
||||
.phy_freq = 2970000000,
|
||||
.venc_freq = 297000000,
|
||||
.vclk_freq = 297000000,
|
||||
.pixel_freq = 297000000,
|
||||
.pll_od1 = 2,
|
||||
.pll_od2 = 1,
|
||||
.pll_od3 = 1,
|
||||
@@ -444,11 +444,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 2,
|
||||
},
|
||||
[MESON_VCLK_HDMI_594000] = {
|
||||
.pll_freq = 5940000,
|
||||
.phy_freq = 5940000,
|
||||
.venc_freq = 594000,
|
||||
.vclk_freq = 594000,
|
||||
.pixel_freq = 594000,
|
||||
.pll_freq = 5940000000,
|
||||
.phy_freq = 5940000000,
|
||||
.venc_freq = 594000000,
|
||||
.vclk_freq = 594000000,
|
||||
.pixel_freq = 594000000,
|
||||
.pll_od1 = 1,
|
||||
.pll_od2 = 1,
|
||||
.pll_od3 = 2,
|
||||
@@ -456,11 +456,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_594000_YUV420] = {
|
||||
.pll_freq = 5940000,
|
||||
.phy_freq = 2970000,
|
||||
.venc_freq = 594000,
|
||||
.vclk_freq = 594000,
|
||||
.pixel_freq = 297000,
|
||||
.pll_freq = 5940000000,
|
||||
.phy_freq = 2970000000,
|
||||
.venc_freq = 594000000,
|
||||
.vclk_freq = 594000000,
|
||||
.pixel_freq = 297000000,
|
||||
.pll_od1 = 2,
|
||||
.pll_od2 = 1,
|
||||
.pll_od3 = 1,
|
||||
@@ -617,16 +617,16 @@ static void meson_hdmi_pll_set_params(struct meson_drm *priv, unsigned int m,
|
||||
3 << 20, pll_od_to_reg(od3) << 20);
|
||||
}
|
||||
|
||||
#define XTAL_FREQ 24000
|
||||
#define XTAL_FREQ (24 * 1000 * 1000)
|
||||
|
||||
static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv,
|
||||
unsigned int pll_freq)
|
||||
unsigned long long pll_freq)
|
||||
{
|
||||
/* The GXBB PLL has a /2 pre-multiplier */
|
||||
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB))
|
||||
pll_freq /= 2;
|
||||
pll_freq = DIV_ROUND_DOWN_ULL(pll_freq, 2);
|
||||
|
||||
return pll_freq / XTAL_FREQ;
|
||||
return DIV_ROUND_DOWN_ULL(pll_freq, XTAL_FREQ);
|
||||
}
|
||||
|
||||
#define HDMI_FRAC_MAX_GXBB 4096
|
||||
@@ -635,12 +635,13 @@ static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv,
|
||||
|
||||
static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
|
||||
unsigned int m,
|
||||
unsigned int pll_freq)
|
||||
unsigned long long pll_freq)
|
||||
{
|
||||
unsigned int parent_freq = XTAL_FREQ;
|
||||
unsigned long long parent_freq = XTAL_FREQ;
|
||||
unsigned int frac_max = HDMI_FRAC_MAX_GXL;
|
||||
unsigned int frac_m;
|
||||
unsigned int frac;
|
||||
u32 remainder;
|
||||
|
||||
/* The GXBB PLL has a /2 pre-multiplier and a larger FRAC width */
|
||||
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
|
||||
@@ -652,11 +653,11 @@ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
|
||||
frac_max = HDMI_FRAC_MAX_G12A;
|
||||
|
||||
/* We can have a perfect match !*/
|
||||
if (pll_freq / m == parent_freq &&
|
||||
pll_freq % m == 0)
|
||||
if (div_u64_rem(pll_freq, m, &remainder) == parent_freq &&
|
||||
remainder == 0)
|
||||
return 0;
|
||||
|
||||
frac = div_u64((u64)pll_freq * (u64)frac_max, parent_freq);
|
||||
frac = mul_u64_u64_div_u64(pll_freq, frac_max, parent_freq);
|
||||
frac_m = m * frac_max;
|
||||
if (frac_m > frac)
|
||||
return frac_max;
|
||||
@@ -666,7 +667,7 @@ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
|
||||
}
|
||||
|
||||
static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
|
||||
unsigned int m,
|
||||
unsigned long long m,
|
||||
unsigned int frac)
|
||||
{
|
||||
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
|
||||
@@ -694,7 +695,7 @@ static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
|
||||
}
|
||||
|
||||
static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
|
||||
unsigned int freq,
|
||||
unsigned long long freq,
|
||||
unsigned int *m,
|
||||
unsigned int *frac,
|
||||
unsigned int *od)
|
||||
@@ -706,7 +707,7 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
|
||||
continue;
|
||||
*frac = meson_hdmi_pll_get_frac(priv, *m, freq * *od);
|
||||
|
||||
DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d\n",
|
||||
DRM_DEBUG_DRIVER("PLL params for %lluHz: m=%x frac=%x od=%d\n",
|
||||
freq, *m, *frac, *od);
|
||||
|
||||
if (meson_hdmi_pll_validate_params(priv, *m, *frac))
|
||||
@@ -718,7 +719,7 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
|
||||
|
||||
/* pll_freq is the frequency after the OD dividers */
|
||||
enum drm_mode_status
|
||||
meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq)
|
||||
meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned long long freq)
|
||||
{
|
||||
unsigned int od, m, frac;
|
||||
|
||||
@@ -741,7 +742,7 @@ EXPORT_SYMBOL_GPL(meson_vclk_dmt_supported_freq);
|
||||
|
||||
/* pll_freq is the frequency after the OD dividers */
|
||||
static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
|
||||
unsigned int pll_freq)
|
||||
unsigned long long pll_freq)
|
||||
{
|
||||
unsigned int od, m, frac, od1, od2, od3;
|
||||
|
||||
@@ -756,7 +757,7 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
|
||||
od1 = od / od2;
|
||||
}
|
||||
|
||||
DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d/%d/%d\n",
|
||||
DRM_DEBUG_DRIVER("PLL params for %lluHz: m=%x frac=%x od=%d/%d/%d\n",
|
||||
pll_freq, m, frac, od1, od2, od3);
|
||||
|
||||
meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
|
||||
@@ -764,17 +765,48 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
|
||||
return;
|
||||
}
|
||||
|
||||
DRM_ERROR("Fatal, unable to find parameters for PLL freq %d\n",
|
||||
DRM_ERROR("Fatal, unable to find parameters for PLL freq %lluHz\n",
|
||||
pll_freq);
|
||||
}
|
||||
|
||||
static bool meson_vclk_freqs_are_matching_param(unsigned int idx,
|
||||
unsigned long long phy_freq,
|
||||
unsigned long long vclk_freq)
|
||||
{
|
||||
DRM_DEBUG_DRIVER("i = %d vclk_freq = %lluHz alt = %lluHz\n",
|
||||
idx, params[idx].vclk_freq,
|
||||
FREQ_1000_1001(params[idx].vclk_freq));
|
||||
DRM_DEBUG_DRIVER("i = %d phy_freq = %lluHz alt = %lluHz\n",
|
||||
idx, params[idx].phy_freq,
|
||||
FREQ_1000_1001(params[idx].phy_freq));
|
||||
|
||||
/* Match strict frequency */
|
||||
if (phy_freq == params[idx].phy_freq &&
|
||||
vclk_freq == params[idx].vclk_freq)
|
||||
return true;
|
||||
|
||||
/* Match 1000/1001 variant: vclk deviation has to be less than 1kHz
|
||||
* (drm EDID is defined in 1kHz steps, so everything smaller must be
|
||||
* rounding error) and the PHY freq deviation has to be less than
|
||||
* 10kHz (as the TMDS clock is 10 times the pixel clock, so anything
|
||||
* smaller must be rounding error as well).
|
||||
*/
|
||||
if (abs(vclk_freq - FREQ_1000_1001(params[idx].vclk_freq)) < 1000 &&
|
||||
abs(phy_freq - FREQ_1000_1001(params[idx].phy_freq)) < 10000)
|
||||
return true;
|
||||
|
||||
/* no match */
|
||||
return false;
|
||||
}
|
||||
|
||||
enum drm_mode_status
|
||||
meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
unsigned int vclk_freq)
|
||||
meson_vclk_vic_supported_freq(struct meson_drm *priv,
|
||||
unsigned long long phy_freq,
|
||||
unsigned long long vclk_freq)
|
||||
{
|
||||
int i;
|
||||
|
||||
DRM_DEBUG_DRIVER("phy_freq = %d vclk_freq = %d\n",
|
||||
DRM_DEBUG_DRIVER("phy_freq = %lluHz vclk_freq = %lluHz\n",
|
||||
phy_freq, vclk_freq);
|
||||
|
||||
/* Check against soc revision/package limits */
|
||||
@@ -785,19 +817,7 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
}
|
||||
|
||||
for (i = 0 ; params[i].pixel_freq ; ++i) {
|
||||
DRM_DEBUG_DRIVER("i = %d pixel_freq = %d alt = %d\n",
|
||||
i, params[i].pixel_freq,
|
||||
FREQ_1000_1001(params[i].pixel_freq));
|
||||
DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n",
|
||||
i, params[i].phy_freq,
|
||||
FREQ_1000_1001(params[i].phy_freq/10)*10);
|
||||
/* Match strict frequency */
|
||||
if (phy_freq == params[i].phy_freq &&
|
||||
vclk_freq == params[i].vclk_freq)
|
||||
return MODE_OK;
|
||||
/* Match 1000/1001 variant */
|
||||
if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) &&
|
||||
vclk_freq == FREQ_1000_1001(params[i].vclk_freq))
|
||||
if (meson_vclk_freqs_are_matching_param(i, phy_freq, vclk_freq))
|
||||
return MODE_OK;
|
||||
}
|
||||
|
||||
@@ -805,8 +825,9 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(meson_vclk_vic_supported_freq);
|
||||
|
||||
static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
unsigned int od1, unsigned int od2, unsigned int od3,
|
||||
static void meson_vclk_set(struct meson_drm *priv,
|
||||
unsigned long long pll_base_freq, unsigned int od1,
|
||||
unsigned int od2, unsigned int od3,
|
||||
unsigned int vid_pll_div, unsigned int vclk_div,
|
||||
unsigned int hdmi_tx_div, unsigned int venc_div,
|
||||
bool hdmi_use_enci, bool vic_alternate_clock)
|
||||
@@ -826,15 +847,15 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
meson_hdmi_pll_generic_set(priv, pll_base_freq);
|
||||
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
|
||||
switch (pll_base_freq) {
|
||||
case 2970000:
|
||||
case 2970000000:
|
||||
m = 0x3d;
|
||||
frac = vic_alternate_clock ? 0xd02 : 0xe00;
|
||||
break;
|
||||
case 4320000:
|
||||
case 4320000000:
|
||||
m = vic_alternate_clock ? 0x59 : 0x5a;
|
||||
frac = vic_alternate_clock ? 0xe8f : 0;
|
||||
break;
|
||||
case 5940000:
|
||||
case 5940000000:
|
||||
m = 0x7b;
|
||||
frac = vic_alternate_clock ? 0xa05 : 0xc00;
|
||||
break;
|
||||
@@ -844,15 +865,15 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
|
||||
meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL)) {
|
||||
switch (pll_base_freq) {
|
||||
case 2970000:
|
||||
case 2970000000:
|
||||
m = 0x7b;
|
||||
frac = vic_alternate_clock ? 0x281 : 0x300;
|
||||
break;
|
||||
case 4320000:
|
||||
case 4320000000:
|
||||
m = vic_alternate_clock ? 0xb3 : 0xb4;
|
||||
frac = vic_alternate_clock ? 0x347 : 0;
|
||||
break;
|
||||
case 5940000:
|
||||
case 5940000000:
|
||||
m = 0xf7;
|
||||
frac = vic_alternate_clock ? 0x102 : 0x200;
|
||||
break;
|
||||
@@ -861,15 +882,15 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
|
||||
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
|
||||
switch (pll_base_freq) {
|
||||
case 2970000:
|
||||
case 2970000000:
|
||||
m = 0x7b;
|
||||
frac = vic_alternate_clock ? 0x140b4 : 0x18000;
|
||||
break;
|
||||
case 4320000:
|
||||
case 4320000000:
|
||||
m = vic_alternate_clock ? 0xb3 : 0xb4;
|
||||
frac = vic_alternate_clock ? 0x1a3ee : 0;
|
||||
break;
|
||||
case 5940000:
|
||||
case 5940000000:
|
||||
m = 0xf7;
|
||||
frac = vic_alternate_clock ? 0x8148 : 0x10000;
|
||||
break;
|
||||
@@ -1025,14 +1046,14 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
}
|
||||
|
||||
void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
unsigned int phy_freq, unsigned int vclk_freq,
|
||||
unsigned int venc_freq, unsigned int dac_freq,
|
||||
unsigned long long phy_freq, unsigned long long vclk_freq,
|
||||
unsigned long long venc_freq, unsigned long long dac_freq,
|
||||
bool hdmi_use_enci)
|
||||
{
|
||||
bool vic_alternate_clock = false;
|
||||
unsigned int freq;
|
||||
unsigned int hdmi_tx_div;
|
||||
unsigned int venc_div;
|
||||
unsigned long long freq;
|
||||
unsigned long long hdmi_tx_div;
|
||||
unsigned long long venc_div;
|
||||
|
||||
if (target == MESON_VCLK_TARGET_CVBS) {
|
||||
meson_venci_cvbs_clock_config(priv);
|
||||
@@ -1052,27 +1073,25 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
return;
|
||||
}
|
||||
|
||||
hdmi_tx_div = vclk_freq / dac_freq;
|
||||
hdmi_tx_div = DIV_ROUND_DOWN_ULL(vclk_freq, dac_freq);
|
||||
|
||||
if (hdmi_tx_div == 0) {
|
||||
pr_err("Fatal Error, invalid HDMI-TX freq %d\n",
|
||||
pr_err("Fatal Error, invalid HDMI-TX freq %lluHz\n",
|
||||
dac_freq);
|
||||
return;
|
||||
}
|
||||
|
||||
venc_div = vclk_freq / venc_freq;
|
||||
venc_div = DIV_ROUND_DOWN_ULL(vclk_freq, venc_freq);
|
||||
|
||||
if (venc_div == 0) {
|
||||
pr_err("Fatal Error, invalid HDMI venc freq %d\n",
|
||||
pr_err("Fatal Error, invalid HDMI venc freq %lluHz\n",
|
||||
venc_freq);
|
||||
return;
|
||||
}
|
||||
|
||||
for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
|
||||
if ((phy_freq == params[freq].phy_freq ||
|
||||
phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
|
||||
(vclk_freq == params[freq].vclk_freq ||
|
||||
vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {
|
||||
if (meson_vclk_freqs_are_matching_param(freq, phy_freq,
|
||||
vclk_freq)) {
|
||||
if (vclk_freq != params[freq].vclk_freq)
|
||||
vic_alternate_clock = true;
|
||||
else
|
||||
@@ -1098,7 +1117,8 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
}
|
||||
|
||||
if (!params[freq].pixel_freq) {
|
||||
pr_err("Fatal Error, invalid HDMI vclk freq %d\n", vclk_freq);
|
||||
pr_err("Fatal Error, invalid HDMI vclk freq %lluHz\n",
|
||||
vclk_freq);
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
@@ -20,17 +20,18 @@ enum {
|
||||
};
|
||||
|
||||
/* 27MHz is the CVBS Pixel Clock */
|
||||
#define MESON_VCLK_CVBS 27000
|
||||
#define MESON_VCLK_CVBS (27 * 1000 * 1000)
|
||||
|
||||
enum drm_mode_status
|
||||
meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq);
|
||||
meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned long long freq);
|
||||
enum drm_mode_status
|
||||
meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
unsigned int vclk_freq);
|
||||
meson_vclk_vic_supported_freq(struct meson_drm *priv,
|
||||
unsigned long long phy_freq,
|
||||
unsigned long long vclk_freq);
|
||||
|
||||
void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
unsigned int phy_freq, unsigned int vclk_freq,
|
||||
unsigned int venc_freq, unsigned int dac_freq,
|
||||
unsigned long long phy_freq, unsigned long long vclk_freq,
|
||||
unsigned long long venc_freq, unsigned long long dac_freq,
|
||||
bool hdmi_use_enci);
|
||||
|
||||
#endif /* __MESON_VCLK_H */
|
||||
|
||||
@@ -2141,13 +2141,14 @@ static const struct display_timing evervision_vgg644804_timing = {
|
||||
static const struct panel_desc evervision_vgg644804 = {
|
||||
.timings = &evervision_vgg644804_timing,
|
||||
.num_timings = 1,
|
||||
.bpc = 8,
|
||||
.bpc = 6,
|
||||
.size = {
|
||||
.width = 115,
|
||||
.height = 86,
|
||||
},
|
||||
.bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
|
||||
.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE,
|
||||
.bus_flags = DRM_BUS_FLAG_DE_HIGH,
|
||||
.connector_type = DRM_MODE_CONNECTOR_LVDS,
|
||||
};
|
||||
|
||||
static const struct display_timing evervision_vgg804821_timing = {
|
||||
|
||||
@@ -32,6 +32,7 @@
|
||||
* Xe's Freq provides a sysfs API for frequency management:
|
||||
*
|
||||
* device/tile#/gt#/freq0/<item>_freq *read-only* files:
|
||||
*
|
||||
* - act_freq: The actual resolved frequency decided by PCODE.
|
||||
* - cur_freq: The current one requested by GuC PC to the PCODE.
|
||||
* - rpn_freq: The Render Performance (RP) N level, which is the minimal one.
|
||||
@@ -39,6 +40,7 @@
|
||||
* - rp0_freq: The Render Performance (RP) 0 level, which is the maximum one.
|
||||
*
|
||||
* device/tile#/gt#/freq0/<item>_freq *read-write* files:
|
||||
*
|
||||
* - min_freq: Min frequency request.
|
||||
* - max_freq: Max frequency request.
|
||||
* If max <= min, then freq_min becomes a fixed frequency request.
|
||||
|
||||
@@ -192,7 +192,7 @@ static void mousevsc_on_receive_device_info(struct mousevsc_dev *input_device,
|
||||
goto cleanup;
|
||||
|
||||
input_device->report_desc_size = le16_to_cpu(
|
||||
desc->desc[0].wDescriptorLength);
|
||||
desc->rpt_desc.wDescriptorLength);
|
||||
if (input_device->report_desc_size == 0) {
|
||||
input_device->dev_info_status = -EINVAL;
|
||||
goto cleanup;
|
||||
@@ -210,7 +210,7 @@ static void mousevsc_on_receive_device_info(struct mousevsc_dev *input_device,
|
||||
|
||||
memcpy(input_device->report_desc,
|
||||
((unsigned char *)desc) + desc->bLength,
|
||||
le16_to_cpu(desc->desc[0].wDescriptorLength));
|
||||
le16_to_cpu(desc->rpt_desc.wDescriptorLength));
|
||||
|
||||
/* Send the ack */
|
||||
memset(&ack, 0, sizeof(struct mousevsc_prt_msg));
|
||||
|
||||
@@ -984,12 +984,11 @@ static int usbhid_parse(struct hid_device *hid)
|
||||
struct usb_host_interface *interface = intf->cur_altsetting;
|
||||
struct usb_device *dev = interface_to_usbdev (intf);
|
||||
struct hid_descriptor *hdesc;
|
||||
struct hid_class_descriptor *hcdesc;
|
||||
u32 quirks = 0;
|
||||
unsigned int rsize = 0;
|
||||
char *rdesc;
|
||||
int ret, n;
|
||||
int num_descriptors;
|
||||
size_t offset = offsetof(struct hid_descriptor, desc);
|
||||
int ret;
|
||||
|
||||
quirks = hid_lookup_quirk(hid);
|
||||
|
||||
@@ -1011,20 +1010,19 @@ static int usbhid_parse(struct hid_device *hid)
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (hdesc->bLength < sizeof(struct hid_descriptor)) {
|
||||
dbg_hid("hid descriptor is too short\n");
|
||||
if (!hdesc->bNumDescriptors ||
|
||||
hdesc->bLength != sizeof(*hdesc) +
|
||||
(hdesc->bNumDescriptors - 1) * sizeof(*hcdesc)) {
|
||||
dbg_hid("hid descriptor invalid, bLen=%hhu bNum=%hhu\n",
|
||||
hdesc->bLength, hdesc->bNumDescriptors);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
hid->version = le16_to_cpu(hdesc->bcdHID);
|
||||
hid->country = hdesc->bCountryCode;
|
||||
|
||||
num_descriptors = min_t(int, hdesc->bNumDescriptors,
|
||||
(hdesc->bLength - offset) / sizeof(struct hid_class_descriptor));
|
||||
|
||||
for (n = 0; n < num_descriptors; n++)
|
||||
if (hdesc->desc[n].bDescriptorType == HID_DT_REPORT)
|
||||
rsize = le16_to_cpu(hdesc->desc[n].wDescriptorLength);
|
||||
if (hdesc->rpt_desc.bDescriptorType == HID_DT_REPORT)
|
||||
rsize = le16_to_cpu(hdesc->rpt_desc.wDescriptorLength);
|
||||
|
||||
if (!rsize || rsize > HID_MAX_DESCRIPTOR_SIZE) {
|
||||
dbg_hid("weird size of report descriptor (%u)\n", rsize);
|
||||
@@ -1052,6 +1050,11 @@ static int usbhid_parse(struct hid_device *hid)
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (hdesc->bNumDescriptors > 1)
|
||||
hid_warn(intf,
|
||||
"%u unsupported optional hid class descriptors\n",
|
||||
(int)(hdesc->bNumDescriptors - 1));
|
||||
|
||||
hid->quirks |= quirks;
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -711,7 +711,7 @@ static int __init catu_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = coresight_init_driver("catu", &catu_driver, &catu_platform_driver);
|
||||
ret = coresight_init_driver("catu", &catu_driver, &catu_platform_driver, THIS_MODULE);
|
||||
tmc_etr_set_catu_ops(&etr_catu_buf_ops);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -228,7 +228,7 @@ struct cscfg_feature_csdev {
|
||||
* @feats_csdev:references to the device features to enable.
|
||||
*/
|
||||
struct cscfg_config_csdev {
|
||||
const struct cscfg_config_desc *config_desc;
|
||||
struct cscfg_config_desc *config_desc;
|
||||
struct coresight_device *csdev;
|
||||
bool enabled;
|
||||
struct list_head node;
|
||||
|
||||
@@ -1427,17 +1427,17 @@ module_init(coresight_init);
|
||||
module_exit(coresight_exit);
|
||||
|
||||
int coresight_init_driver(const char *drv, struct amba_driver *amba_drv,
|
||||
struct platform_driver *pdev_drv)
|
||||
struct platform_driver *pdev_drv, struct module *owner)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = amba_driver_register(amba_drv);
|
||||
ret = __amba_driver_register(amba_drv, owner);
|
||||
if (ret) {
|
||||
pr_err("%s: error registering AMBA driver\n", drv);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = platform_driver_register(pdev_drv);
|
||||
ret = __platform_driver_register(pdev_drv, owner);
|
||||
if (!ret)
|
||||
return 0;
|
||||
|
||||
|
||||
@@ -774,7 +774,8 @@ static struct platform_driver debug_platform_driver = {
|
||||
|
||||
static int __init debug_init(void)
|
||||
{
|
||||
return coresight_init_driver("debug", &debug_driver, &debug_platform_driver);
|
||||
return coresight_init_driver("debug", &debug_driver, &debug_platform_driver,
|
||||
THIS_MODULE);
|
||||
}
|
||||
|
||||
static void __exit debug_exit(void)
|
||||
|
||||
@@ -433,7 +433,8 @@ static struct amba_driver dynamic_funnel_driver = {
|
||||
|
||||
static int __init funnel_init(void)
|
||||
{
|
||||
return coresight_init_driver("funnel", &dynamic_funnel_driver, &funnel_driver);
|
||||
return coresight_init_driver("funnel", &dynamic_funnel_driver, &funnel_driver,
|
||||
THIS_MODULE);
|
||||
}
|
||||
|
||||
static void __exit funnel_exit(void)
|
||||
|
||||
@@ -438,7 +438,8 @@ static struct amba_driver dynamic_replicator_driver = {
|
||||
|
||||
static int __init replicator_init(void)
|
||||
{
|
||||
return coresight_init_driver("replicator", &dynamic_replicator_driver, &replicator_driver);
|
||||
return coresight_init_driver("replicator", &dynamic_replicator_driver, &replicator_driver,
|
||||
THIS_MODULE);
|
||||
}
|
||||
|
||||
static void __exit replicator_exit(void)
|
||||
|
||||
@@ -1047,7 +1047,7 @@ static struct platform_driver stm_platform_driver = {
|
||||
|
||||
static int __init stm_init(void)
|
||||
{
|
||||
return coresight_init_driver("stm", &stm_driver, &stm_platform_driver);
|
||||
return coresight_init_driver("stm", &stm_driver, &stm_platform_driver, THIS_MODULE);
|
||||
}
|
||||
|
||||
static void __exit stm_exit(void)
|
||||
|
||||
@@ -867,6 +867,25 @@ unlock_exit:
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(cscfg_csdev_reset_feats);
|
||||
|
||||
static bool cscfg_config_desc_get(struct cscfg_config_desc *config_desc)
|
||||
{
|
||||
if (!atomic_fetch_inc(&config_desc->active_cnt)) {
|
||||
/* must ensure that config cannot be unloaded in use */
|
||||
if (unlikely(cscfg_owner_get(config_desc->load_owner))) {
|
||||
atomic_dec(&config_desc->active_cnt);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static void cscfg_config_desc_put(struct cscfg_config_desc *config_desc)
|
||||
{
|
||||
if (!atomic_dec_return(&config_desc->active_cnt))
|
||||
cscfg_owner_put(config_desc->load_owner);
|
||||
}
|
||||
|
||||
/*
|
||||
* This activate configuration for either perf or sysfs. Perf can have multiple
|
||||
* active configs, selected per event, sysfs is limited to one.
|
||||
@@ -890,22 +909,17 @@ static int _cscfg_activate_config(unsigned long cfg_hash)
|
||||
if (config_desc->available == false)
|
||||
return -EBUSY;
|
||||
|
||||
/* must ensure that config cannot be unloaded in use */
|
||||
err = cscfg_owner_get(config_desc->load_owner);
|
||||
if (err)
|
||||
if (!cscfg_config_desc_get(config_desc)) {
|
||||
err = -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
/*
|
||||
* increment the global active count - control changes to
|
||||
* active configurations
|
||||
*/
|
||||
atomic_inc(&cscfg_mgr->sys_active_cnt);
|
||||
|
||||
/*
|
||||
* mark the descriptor as active so enable config on a
|
||||
* device instance will use it
|
||||
*/
|
||||
atomic_inc(&config_desc->active_cnt);
|
||||
|
||||
err = 0;
|
||||
dev_dbg(cscfg_device(), "Activate config %s.\n", config_desc->name);
|
||||
break;
|
||||
@@ -920,9 +934,8 @@ static void _cscfg_deactivate_config(unsigned long cfg_hash)
|
||||
|
||||
list_for_each_entry(config_desc, &cscfg_mgr->config_desc_list, item) {
|
||||
if ((unsigned long)config_desc->event_ea->var == cfg_hash) {
|
||||
atomic_dec(&config_desc->active_cnt);
|
||||
atomic_dec(&cscfg_mgr->sys_active_cnt);
|
||||
cscfg_owner_put(config_desc->load_owner);
|
||||
cscfg_config_desc_put(config_desc);
|
||||
dev_dbg(cscfg_device(), "Deactivate config %s.\n", config_desc->name);
|
||||
break;
|
||||
}
|
||||
@@ -1047,7 +1060,7 @@ int cscfg_csdev_enable_active_config(struct coresight_device *csdev,
|
||||
unsigned long cfg_hash, int preset)
|
||||
{
|
||||
struct cscfg_config_csdev *config_csdev_active = NULL, *config_csdev_item;
|
||||
const struct cscfg_config_desc *config_desc;
|
||||
struct cscfg_config_desc *config_desc;
|
||||
unsigned long flags;
|
||||
int err = 0;
|
||||
|
||||
@@ -1062,8 +1075,8 @@ int cscfg_csdev_enable_active_config(struct coresight_device *csdev,
|
||||
spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags);
|
||||
list_for_each_entry(config_csdev_item, &csdev->config_csdev_list, node) {
|
||||
config_desc = config_csdev_item->config_desc;
|
||||
if ((atomic_read(&config_desc->active_cnt)) &&
|
||||
((unsigned long)config_desc->event_ea->var == cfg_hash)) {
|
||||
if (((unsigned long)config_desc->event_ea->var == cfg_hash) &&
|
||||
cscfg_config_desc_get(config_desc)) {
|
||||
config_csdev_active = config_csdev_item;
|
||||
csdev->active_cscfg_ctxt = (void *)config_csdev_active;
|
||||
break;
|
||||
@@ -1097,7 +1110,11 @@ int cscfg_csdev_enable_active_config(struct coresight_device *csdev,
|
||||
err = -EBUSY;
|
||||
spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags);
|
||||
}
|
||||
|
||||
if (err)
|
||||
cscfg_config_desc_put(config_desc);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(cscfg_csdev_enable_active_config);
|
||||
@@ -1136,8 +1153,10 @@ void cscfg_csdev_disable_active_config(struct coresight_device *csdev)
|
||||
spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags);
|
||||
|
||||
/* true if there was an enabled active config */
|
||||
if (config_csdev)
|
||||
if (config_csdev) {
|
||||
cscfg_csdev_disable_config(config_csdev);
|
||||
cscfg_config_desc_put(config_csdev->config_desc);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(cscfg_csdev_disable_active_config);
|
||||
|
||||
|
||||
@@ -741,7 +741,7 @@ static struct platform_driver tmc_platform_driver = {
|
||||
|
||||
static int __init tmc_init(void)
|
||||
{
|
||||
return coresight_init_driver("tmc", &tmc_driver, &tmc_platform_driver);
|
||||
return coresight_init_driver("tmc", &tmc_driver, &tmc_platform_driver, THIS_MODULE);
|
||||
}
|
||||
|
||||
static void __exit tmc_exit(void)
|
||||
|
||||
@@ -318,7 +318,7 @@ static struct platform_driver tpiu_platform_driver = {
|
||||
|
||||
static int __init tpiu_init(void)
|
||||
{
|
||||
return coresight_init_driver("tpiu", &tpiu_driver, &tpiu_platform_driver);
|
||||
return coresight_init_driver("tpiu", &tpiu_driver, &tpiu_platform_driver, THIS_MODULE);
|
||||
}
|
||||
|
||||
static void __exit tpiu_exit(void)
|
||||
|
||||
@@ -300,9 +300,9 @@ static int ad7124_get_3db_filter_freq(struct ad7124_state *st,
|
||||
|
||||
switch (st->channels[channel].cfg.filter_type) {
|
||||
case AD7124_SINC3_FILTER:
|
||||
return DIV_ROUND_CLOSEST(fadc * 230, 1000);
|
||||
return DIV_ROUND_CLOSEST(fadc * 272, 1000);
|
||||
case AD7124_SINC4_FILTER:
|
||||
return DIV_ROUND_CLOSEST(fadc * 262, 1000);
|
||||
return DIV_ROUND_CLOSEST(fadc * 230, 1000);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
* Copyright (C) 2018 Kent Gustavsson <kent@minoris.se>
|
||||
*/
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/bits.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/cleanup.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/delay.h>
|
||||
@@ -79,6 +79,8 @@
|
||||
#define MCP3910_CONFIG1_CLKEXT BIT(6)
|
||||
#define MCP3910_CONFIG1_VREFEXT BIT(7)
|
||||
|
||||
#define MCP3910_CHANNEL(ch) (MCP3911_REG_CHANNEL0 + (ch))
|
||||
|
||||
#define MCP3910_REG_OFFCAL_CH0 0x0f
|
||||
#define MCP3910_OFFCAL(ch) (MCP3910_REG_OFFCAL_CH0 + (ch) * 6)
|
||||
|
||||
@@ -110,6 +112,7 @@ struct mcp3911_chip_info {
|
||||
int (*get_offset)(struct mcp3911 *adc, int channel, int *val);
|
||||
int (*set_offset)(struct mcp3911 *adc, int channel, int val);
|
||||
int (*set_scale)(struct mcp3911 *adc, int channel, u32 val);
|
||||
int (*get_raw)(struct mcp3911 *adc, int channel, int *val);
|
||||
};
|
||||
|
||||
struct mcp3911 {
|
||||
@@ -170,6 +173,18 @@ static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, u32 val, u8 len
|
||||
return mcp3911_write(adc, reg, val, len);
|
||||
}
|
||||
|
||||
static int mcp3911_read_s24(struct mcp3911 *const adc, u8 const reg, s32 *const val)
|
||||
{
|
||||
u32 uval;
|
||||
int const ret = mcp3911_read(adc, reg, &uval, 3);
|
||||
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
*val = sign_extend32(uval, 23);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int mcp3910_enable_offset(struct mcp3911 *adc, bool enable)
|
||||
{
|
||||
unsigned int mask = MCP3910_CONFIG0_EN_OFFCAL;
|
||||
@@ -194,6 +209,11 @@ static int mcp3910_set_offset(struct mcp3911 *adc, int channel, int val)
|
||||
return adc->chip->enable_offset(adc, 1);
|
||||
}
|
||||
|
||||
static int mcp3910_get_raw(struct mcp3911 *adc, int channel, s32 *val)
|
||||
{
|
||||
return mcp3911_read_s24(adc, MCP3910_CHANNEL(channel), val);
|
||||
}
|
||||
|
||||
static int mcp3911_enable_offset(struct mcp3911 *adc, bool enable)
|
||||
{
|
||||
unsigned int mask = MCP3911_STATUSCOM_EN_OFFCAL;
|
||||
@@ -218,6 +238,11 @@ static int mcp3911_set_offset(struct mcp3911 *adc, int channel, int val)
|
||||
return adc->chip->enable_offset(adc, 1);
|
||||
}
|
||||
|
||||
static int mcp3911_get_raw(struct mcp3911 *adc, int channel, s32 *val)
|
||||
{
|
||||
return mcp3911_read_s24(adc, MCP3911_CHANNEL(channel), val);
|
||||
}
|
||||
|
||||
static int mcp3910_get_osr(struct mcp3911 *adc, u32 *val)
|
||||
{
|
||||
int ret;
|
||||
@@ -321,12 +346,9 @@ static int mcp3911_read_raw(struct iio_dev *indio_dev,
|
||||
guard(mutex)(&adc->lock);
|
||||
switch (mask) {
|
||||
case IIO_CHAN_INFO_RAW:
|
||||
ret = mcp3911_read(adc,
|
||||
MCP3911_CHANNEL(channel->channel), val, 3);
|
||||
ret = adc->chip->get_raw(adc, channel->channel, val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
*val = sign_extend32(*val, 23);
|
||||
return IIO_VAL_INT;
|
||||
case IIO_CHAN_INFO_OFFSET:
|
||||
ret = adc->chip->get_offset(adc, channel->channel, val);
|
||||
@@ -799,6 +821,7 @@ static const struct mcp3911_chip_info mcp3911_chip_info[] = {
|
||||
.get_offset = mcp3910_get_offset,
|
||||
.set_offset = mcp3910_set_offset,
|
||||
.set_scale = mcp3910_set_scale,
|
||||
.get_raw = mcp3910_get_raw,
|
||||
},
|
||||
[MCP3911] = {
|
||||
.channels = mcp3911_channels,
|
||||
@@ -810,6 +833,7 @@ static const struct mcp3911_chip_info mcp3911_chip_info[] = {
|
||||
.get_offset = mcp3911_get_offset,
|
||||
.set_offset = mcp3911_set_offset,
|
||||
.set_scale = mcp3911_set_scale,
|
||||
.get_raw = mcp3911_get_raw,
|
||||
},
|
||||
[MCP3912] = {
|
||||
.channels = mcp3912_channels,
|
||||
@@ -821,6 +845,7 @@ static const struct mcp3911_chip_info mcp3911_chip_info[] = {
|
||||
.get_offset = mcp3910_get_offset,
|
||||
.set_offset = mcp3910_set_offset,
|
||||
.set_scale = mcp3910_set_scale,
|
||||
.get_raw = mcp3910_get_raw,
|
||||
},
|
||||
[MCP3913] = {
|
||||
.channels = mcp3913_channels,
|
||||
@@ -832,6 +857,7 @@ static const struct mcp3911_chip_info mcp3911_chip_info[] = {
|
||||
.get_offset = mcp3910_get_offset,
|
||||
.set_offset = mcp3910_set_offset,
|
||||
.set_scale = mcp3910_set_scale,
|
||||
.get_raw = mcp3910_get_raw,
|
||||
},
|
||||
[MCP3914] = {
|
||||
.channels = mcp3914_channels,
|
||||
@@ -843,6 +869,7 @@ static const struct mcp3911_chip_info mcp3911_chip_info[] = {
|
||||
.get_offset = mcp3910_get_offset,
|
||||
.set_offset = mcp3910_set_offset,
|
||||
.set_scale = mcp3910_set_scale,
|
||||
.get_raw = mcp3910_get_raw,
|
||||
},
|
||||
[MCP3918] = {
|
||||
.channels = mcp3918_channels,
|
||||
@@ -854,6 +881,7 @@ static const struct mcp3911_chip_info mcp3911_chip_info[] = {
|
||||
.get_offset = mcp3910_get_offset,
|
||||
.set_offset = mcp3910_set_offset,
|
||||
.set_scale = mcp3910_set_scale,
|
||||
.get_raw = mcp3910_get_raw,
|
||||
},
|
||||
[MCP3919] = {
|
||||
.channels = mcp3919_channels,
|
||||
@@ -865,6 +893,7 @@ static const struct mcp3911_chip_info mcp3911_chip_info[] = {
|
||||
.get_offset = mcp3910_get_offset,
|
||||
.set_offset = mcp3910_set_offset,
|
||||
.set_scale = mcp3910_set_scale,
|
||||
.get_raw = mcp3910_get_raw,
|
||||
},
|
||||
};
|
||||
static const struct of_device_id mcp3911_dt_ids[] = {
|
||||
|
||||
@@ -1081,7 +1081,7 @@ static int pac1934_chip_identify(struct pac1934_chip_info *info)
|
||||
|
||||
/*
|
||||
* documentation related to the ACPI device definition
|
||||
* https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ApplicationNotes/ApplicationNotes/PAC1934-Integration-Notes-for-Microsoft-Windows-10-and-Windows-11-Driver-Support-DS00002534.pdf
|
||||
* https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ApplicationNotes/ApplicationNotes/PAC193X-Integration-Notes-for-Microsoft-Windows-10-and-Windows-11-Driver-Support-DS00002534.pdf
|
||||
*/
|
||||
static int pac1934_acpi_parse_channel_config(struct i2c_client *client,
|
||||
struct pac1934_chip_info *info)
|
||||
|
||||
@@ -14,6 +14,7 @@
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/notifier.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/units.h>
|
||||
@@ -70,6 +71,16 @@
|
||||
#define ADMV8818_HPF_WR0_MSK GENMASK(7, 4)
|
||||
#define ADMV8818_LPF_WR0_MSK GENMASK(3, 0)
|
||||
|
||||
#define ADMV8818_BAND_BYPASS 0
|
||||
#define ADMV8818_BAND_MIN 1
|
||||
#define ADMV8818_BAND_MAX 4
|
||||
#define ADMV8818_BAND_CORNER_LOW 0
|
||||
#define ADMV8818_BAND_CORNER_HIGH 1
|
||||
|
||||
#define ADMV8818_STATE_MIN 0
|
||||
#define ADMV8818_STATE_MAX 15
|
||||
#define ADMV8818_NUM_STATES 16
|
||||
|
||||
enum {
|
||||
ADMV8818_BW_FREQ,
|
||||
ADMV8818_CENTER_FREQ
|
||||
@@ -90,20 +101,24 @@ struct admv8818_state {
|
||||
struct mutex lock;
|
||||
unsigned int filter_mode;
|
||||
u64 cf_hz;
|
||||
u64 lpf_margin_hz;
|
||||
u64 hpf_margin_hz;
|
||||
};
|
||||
|
||||
static const unsigned long long freq_range_hpf[4][2] = {
|
||||
static const unsigned long long freq_range_hpf[5][2] = {
|
||||
{0ULL, 0ULL}, /* bypass */
|
||||
{1750000000ULL, 3550000000ULL},
|
||||
{3400000000ULL, 7250000000ULL},
|
||||
{6600000000, 12000000000},
|
||||
{12500000000, 19900000000}
|
||||
};
|
||||
|
||||
static const unsigned long long freq_range_lpf[4][2] = {
|
||||
static const unsigned long long freq_range_lpf[5][2] = {
|
||||
{U64_MAX, U64_MAX}, /* bypass */
|
||||
{2050000000ULL, 3850000000ULL},
|
||||
{3350000000ULL, 7250000000ULL},
|
||||
{7000000000, 13000000000},
|
||||
{12550000000, 18500000000}
|
||||
{12550000000, 18850000000}
|
||||
};
|
||||
|
||||
static const struct regmap_config admv8818_regmap_config = {
|
||||
@@ -121,42 +136,57 @@ static const char * const admv8818_modes[] = {
|
||||
|
||||
static int __admv8818_hpf_select(struct admv8818_state *st, u64 freq)
|
||||
{
|
||||
unsigned int hpf_step = 0, hpf_band = 0, i, j;
|
||||
u64 freq_step;
|
||||
int ret;
|
||||
int band, state, ret;
|
||||
unsigned int hpf_state = ADMV8818_STATE_MIN, hpf_band = ADMV8818_BAND_BYPASS;
|
||||
u64 freq_error, min_freq_error, freq_corner, freq_step;
|
||||
|
||||
if (freq < freq_range_hpf[0][0])
|
||||
if (freq < freq_range_hpf[ADMV8818_BAND_MIN][ADMV8818_BAND_CORNER_LOW])
|
||||
goto hpf_write;
|
||||
|
||||
if (freq > freq_range_hpf[3][1]) {
|
||||
hpf_step = 15;
|
||||
hpf_band = 4;
|
||||
|
||||
if (freq >= freq_range_hpf[ADMV8818_BAND_MAX][ADMV8818_BAND_CORNER_HIGH]) {
|
||||
hpf_state = ADMV8818_STATE_MAX;
|
||||
hpf_band = ADMV8818_BAND_MAX;
|
||||
goto hpf_write;
|
||||
}
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
freq_step = div_u64((freq_range_hpf[i][1] -
|
||||
freq_range_hpf[i][0]), 15);
|
||||
|
||||
if (freq > freq_range_hpf[i][0] &&
|
||||
(freq < freq_range_hpf[i][1] + freq_step)) {
|
||||
hpf_band = i + 1;
|
||||
|
||||
for (j = 1; j <= 16; j++) {
|
||||
if (freq < (freq_range_hpf[i][0] + (freq_step * j))) {
|
||||
hpf_step = j - 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Close HPF frequency gap between 12 and 12.5 GHz */
|
||||
if (freq >= 12000 * HZ_PER_MHZ && freq <= 12500 * HZ_PER_MHZ) {
|
||||
if (freq >= 12000ULL * HZ_PER_MHZ && freq < 12500ULL * HZ_PER_MHZ) {
|
||||
hpf_state = ADMV8818_STATE_MAX;
|
||||
hpf_band = 3;
|
||||
hpf_step = 15;
|
||||
goto hpf_write;
|
||||
}
|
||||
|
||||
min_freq_error = U64_MAX;
|
||||
for (band = ADMV8818_BAND_MIN; band <= ADMV8818_BAND_MAX; band++) {
|
||||
/*
|
||||
* This (and therefore all other ranges) have a corner
|
||||
* frequency higher than the target frequency.
|
||||
*/
|
||||
if (freq_range_hpf[band][ADMV8818_BAND_CORNER_LOW] > freq)
|
||||
break;
|
||||
|
||||
freq_step = freq_range_hpf[band][ADMV8818_BAND_CORNER_HIGH] -
|
||||
freq_range_hpf[band][ADMV8818_BAND_CORNER_LOW];
|
||||
freq_step = div_u64(freq_step, ADMV8818_NUM_STATES - 1);
|
||||
|
||||
for (state = ADMV8818_STATE_MIN; state <= ADMV8818_STATE_MAX; state++) {
|
||||
freq_corner = freq_range_hpf[band][ADMV8818_BAND_CORNER_LOW] +
|
||||
freq_step * state;
|
||||
|
||||
/*
|
||||
* This (and therefore all other states) have a corner
|
||||
* frequency higher than the target frequency.
|
||||
*/
|
||||
if (freq_corner > freq)
|
||||
break;
|
||||
|
||||
freq_error = freq - freq_corner;
|
||||
if (freq_error < min_freq_error) {
|
||||
min_freq_error = freq_error;
|
||||
hpf_state = state;
|
||||
hpf_band = band;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
hpf_write:
|
||||
@@ -170,7 +200,7 @@ hpf_write:
|
||||
|
||||
return regmap_update_bits(st->regmap, ADMV8818_REG_WR0_FILTER,
|
||||
ADMV8818_HPF_WR0_MSK,
|
||||
FIELD_PREP(ADMV8818_HPF_WR0_MSK, hpf_step));
|
||||
FIELD_PREP(ADMV8818_HPF_WR0_MSK, hpf_state));
|
||||
}
|
||||
|
||||
static int admv8818_hpf_select(struct admv8818_state *st, u64 freq)
|
||||
@@ -186,31 +216,52 @@ static int admv8818_hpf_select(struct admv8818_state *st, u64 freq)
|
||||
|
||||
static int __admv8818_lpf_select(struct admv8818_state *st, u64 freq)
|
||||
{
|
||||
unsigned int lpf_step = 0, lpf_band = 0, i, j;
|
||||
u64 freq_step;
|
||||
int ret;
|
||||
int band, state, ret;
|
||||
unsigned int lpf_state = ADMV8818_STATE_MIN, lpf_band = ADMV8818_BAND_BYPASS;
|
||||
u64 freq_error, min_freq_error, freq_corner, freq_step;
|
||||
|
||||
if (freq > freq_range_lpf[3][1])
|
||||
if (freq > freq_range_lpf[ADMV8818_BAND_MAX][ADMV8818_BAND_CORNER_HIGH])
|
||||
goto lpf_write;
|
||||
|
||||
if (freq < freq_range_lpf[0][0]) {
|
||||
lpf_band = 1;
|
||||
|
||||
if (freq < freq_range_lpf[ADMV8818_BAND_MIN][ADMV8818_BAND_CORNER_LOW]) {
|
||||
lpf_state = ADMV8818_STATE_MIN;
|
||||
lpf_band = ADMV8818_BAND_MIN;
|
||||
goto lpf_write;
|
||||
}
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
if (freq > freq_range_lpf[i][0] && freq < freq_range_lpf[i][1]) {
|
||||
lpf_band = i + 1;
|
||||
freq_step = div_u64((freq_range_lpf[i][1] - freq_range_lpf[i][0]), 15);
|
||||
|
||||
for (j = 0; j <= 15; j++) {
|
||||
if (freq < (freq_range_lpf[i][0] + (freq_step * j))) {
|
||||
lpf_step = j;
|
||||
break;
|
||||
}
|
||||
}
|
||||
min_freq_error = U64_MAX;
|
||||
for (band = ADMV8818_BAND_MAX; band >= ADMV8818_BAND_MIN; --band) {
|
||||
/*
|
||||
* At this point the highest corner frequency of
|
||||
* all remaining ranges is below the target.
|
||||
* LPF corner should be >= the target.
|
||||
*/
|
||||
if (freq > freq_range_lpf[band][ADMV8818_BAND_CORNER_HIGH])
|
||||
break;
|
||||
|
||||
freq_step = freq_range_lpf[band][ADMV8818_BAND_CORNER_HIGH] -
|
||||
freq_range_lpf[band][ADMV8818_BAND_CORNER_LOW];
|
||||
freq_step = div_u64(freq_step, ADMV8818_NUM_STATES - 1);
|
||||
|
||||
for (state = ADMV8818_STATE_MAX; state >= ADMV8818_STATE_MIN; --state) {
|
||||
|
||||
freq_corner = freq_range_lpf[band][ADMV8818_BAND_CORNER_LOW] +
|
||||
state * freq_step;
|
||||
|
||||
/*
|
||||
* At this point all other states in range will
|
||||
* place the corner frequency below the target
|
||||
* LPF corner should >= the target.
|
||||
*/
|
||||
if (freq > freq_corner)
|
||||
break;
|
||||
|
||||
freq_error = freq_corner - freq;
|
||||
if (freq_error < min_freq_error) {
|
||||
min_freq_error = freq_error;
|
||||
lpf_state = state;
|
||||
lpf_band = band;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -225,7 +276,7 @@ lpf_write:
|
||||
|
||||
return regmap_update_bits(st->regmap, ADMV8818_REG_WR0_FILTER,
|
||||
ADMV8818_LPF_WR0_MSK,
|
||||
FIELD_PREP(ADMV8818_LPF_WR0_MSK, lpf_step));
|
||||
FIELD_PREP(ADMV8818_LPF_WR0_MSK, lpf_state));
|
||||
}
|
||||
|
||||
static int admv8818_lpf_select(struct admv8818_state *st, u64 freq)
|
||||
@@ -242,16 +293,28 @@ static int admv8818_lpf_select(struct admv8818_state *st, u64 freq)
|
||||
static int admv8818_rfin_band_select(struct admv8818_state *st)
|
||||
{
|
||||
int ret;
|
||||
u64 hpf_corner_target, lpf_corner_target;
|
||||
|
||||
st->cf_hz = clk_get_rate(st->clkin);
|
||||
|
||||
/* Check for underflow */
|
||||
if (st->cf_hz > st->hpf_margin_hz)
|
||||
hpf_corner_target = st->cf_hz - st->hpf_margin_hz;
|
||||
else
|
||||
hpf_corner_target = 0;
|
||||
|
||||
/* Check for overflow */
|
||||
lpf_corner_target = st->cf_hz + st->lpf_margin_hz;
|
||||
if (lpf_corner_target < st->cf_hz)
|
||||
lpf_corner_target = U64_MAX;
|
||||
|
||||
mutex_lock(&st->lock);
|
||||
|
||||
ret = __admv8818_hpf_select(st, st->cf_hz);
|
||||
ret = __admv8818_hpf_select(st, hpf_corner_target);
|
||||
if (ret)
|
||||
goto exit;
|
||||
|
||||
ret = __admv8818_lpf_select(st, st->cf_hz);
|
||||
ret = __admv8818_lpf_select(st, lpf_corner_target);
|
||||
exit:
|
||||
mutex_unlock(&st->lock);
|
||||
return ret;
|
||||
@@ -278,8 +341,11 @@ static int __admv8818_read_hpf_freq(struct admv8818_state *st, u64 *hpf_freq)
|
||||
|
||||
hpf_state = FIELD_GET(ADMV8818_HPF_WR0_MSK, data);
|
||||
|
||||
*hpf_freq = div_u64(freq_range_hpf[hpf_band - 1][1] - freq_range_hpf[hpf_band - 1][0], 15);
|
||||
*hpf_freq = freq_range_hpf[hpf_band - 1][0] + (*hpf_freq * hpf_state);
|
||||
*hpf_freq = freq_range_hpf[hpf_band][ADMV8818_BAND_CORNER_HIGH] -
|
||||
freq_range_hpf[hpf_band][ADMV8818_BAND_CORNER_LOW];
|
||||
*hpf_freq = div_u64(*hpf_freq, ADMV8818_NUM_STATES - 1);
|
||||
*hpf_freq = freq_range_hpf[hpf_band][ADMV8818_BAND_CORNER_LOW] +
|
||||
(*hpf_freq * hpf_state);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -316,8 +382,11 @@ static int __admv8818_read_lpf_freq(struct admv8818_state *st, u64 *lpf_freq)
|
||||
|
||||
lpf_state = FIELD_GET(ADMV8818_LPF_WR0_MSK, data);
|
||||
|
||||
*lpf_freq = div_u64(freq_range_lpf[lpf_band - 1][1] - freq_range_lpf[lpf_band - 1][0], 15);
|
||||
*lpf_freq = freq_range_lpf[lpf_band - 1][0] + (*lpf_freq * lpf_state);
|
||||
*lpf_freq = freq_range_lpf[lpf_band][ADMV8818_BAND_CORNER_HIGH] -
|
||||
freq_range_lpf[lpf_band][ADMV8818_BAND_CORNER_LOW];
|
||||
*lpf_freq = div_u64(*lpf_freq, ADMV8818_NUM_STATES - 1);
|
||||
*lpf_freq = freq_range_lpf[lpf_band][ADMV8818_BAND_CORNER_LOW] +
|
||||
(*lpf_freq * lpf_state);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -333,6 +402,19 @@ static int admv8818_read_lpf_freq(struct admv8818_state *st, u64 *lpf_freq)
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int admv8818_write_raw_get_fmt(struct iio_dev *indio_dev,
|
||||
struct iio_chan_spec const *chan,
|
||||
long mask)
|
||||
{
|
||||
switch (mask) {
|
||||
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
|
||||
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
|
||||
return IIO_VAL_INT_64;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int admv8818_write_raw(struct iio_dev *indio_dev,
|
||||
struct iio_chan_spec const *chan,
|
||||
int val, int val2, long info)
|
||||
@@ -341,6 +423,9 @@ static int admv8818_write_raw(struct iio_dev *indio_dev,
|
||||
|
||||
u64 freq = ((u64)val2 << 32 | (u32)val);
|
||||
|
||||
if ((s64)freq < 0)
|
||||
return -EINVAL;
|
||||
|
||||
switch (info) {
|
||||
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
|
||||
return admv8818_lpf_select(st, freq);
|
||||
@@ -502,6 +587,7 @@ set_mode:
|
||||
|
||||
static const struct iio_info admv8818_info = {
|
||||
.write_raw = admv8818_write_raw,
|
||||
.write_raw_get_fmt = admv8818_write_raw_get_fmt,
|
||||
.read_raw = admv8818_read_raw,
|
||||
.debugfs_reg_access = &admv8818_reg_access,
|
||||
};
|
||||
@@ -641,6 +727,32 @@ static int admv8818_clk_setup(struct admv8818_state *st)
|
||||
return devm_add_action_or_reset(&spi->dev, admv8818_clk_notifier_unreg, st);
|
||||
}
|
||||
|
||||
static int admv8818_read_properties(struct admv8818_state *st)
|
||||
{
|
||||
struct spi_device *spi = st->spi;
|
||||
u32 mhz;
|
||||
int ret;
|
||||
|
||||
ret = device_property_read_u32(&spi->dev, "adi,lpf-margin-mhz", &mhz);
|
||||
if (ret == 0)
|
||||
st->lpf_margin_hz = (u64)mhz * HZ_PER_MHZ;
|
||||
else if (ret == -EINVAL)
|
||||
st->lpf_margin_hz = 0;
|
||||
else
|
||||
return ret;
|
||||
|
||||
|
||||
ret = device_property_read_u32(&spi->dev, "adi,hpf-margin-mhz", &mhz);
|
||||
if (ret == 0)
|
||||
st->hpf_margin_hz = (u64)mhz * HZ_PER_MHZ;
|
||||
else if (ret == -EINVAL)
|
||||
st->hpf_margin_hz = 0;
|
||||
else if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int admv8818_probe(struct spi_device *spi)
|
||||
{
|
||||
struct iio_dev *indio_dev;
|
||||
@@ -672,6 +784,10 @@ static int admv8818_probe(struct spi_device *spi)
|
||||
|
||||
mutex_init(&st->lock);
|
||||
|
||||
ret = admv8818_read_properties(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = admv8818_init(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@@ -4,6 +4,7 @@
|
||||
* Copyright (C) 2016 Zodiac Inflight Innovations
|
||||
*/
|
||||
|
||||
#include "linux/device.h"
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/rmi.h>
|
||||
#include <linux/firmware.h>
|
||||
@@ -298,39 +299,30 @@ out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int rmi_f34_status(struct rmi_function *fn)
|
||||
{
|
||||
struct f34_data *f34 = dev_get_drvdata(&fn->dev);
|
||||
|
||||
/*
|
||||
* The status is the percentage complete, or once complete,
|
||||
* zero for success or a negative return code.
|
||||
*/
|
||||
return f34->update_status;
|
||||
}
|
||||
|
||||
static ssize_t rmi_driver_bootloader_id_show(struct device *dev,
|
||||
struct device_attribute *dattr,
|
||||
char *buf)
|
||||
{
|
||||
struct rmi_driver_data *data = dev_get_drvdata(dev);
|
||||
struct rmi_function *fn = data->f34_container;
|
||||
struct rmi_function *fn;
|
||||
struct f34_data *f34;
|
||||
|
||||
if (fn) {
|
||||
f34 = dev_get_drvdata(&fn->dev);
|
||||
fn = data->f34_container;
|
||||
if (!fn)
|
||||
return -ENODEV;
|
||||
|
||||
if (f34->bl_version == 5)
|
||||
return sysfs_emit(buf, "%c%c\n",
|
||||
f34->bootloader_id[0],
|
||||
f34->bootloader_id[1]);
|
||||
else
|
||||
return sysfs_emit(buf, "V%d.%d\n",
|
||||
f34->bootloader_id[1],
|
||||
f34->bootloader_id[0]);
|
||||
}
|
||||
f34 = dev_get_drvdata(&fn->dev);
|
||||
if (!f34)
|
||||
return -ENODEV;
|
||||
|
||||
return 0;
|
||||
if (f34->bl_version == 5)
|
||||
return sysfs_emit(buf, "%c%c\n",
|
||||
f34->bootloader_id[0],
|
||||
f34->bootloader_id[1]);
|
||||
else
|
||||
return sysfs_emit(buf, "V%d.%d\n",
|
||||
f34->bootloader_id[1],
|
||||
f34->bootloader_id[0]);
|
||||
}
|
||||
|
||||
static DEVICE_ATTR(bootloader_id, 0444, rmi_driver_bootloader_id_show, NULL);
|
||||
@@ -343,13 +335,16 @@ static ssize_t rmi_driver_configuration_id_show(struct device *dev,
|
||||
struct rmi_function *fn = data->f34_container;
|
||||
struct f34_data *f34;
|
||||
|
||||
if (fn) {
|
||||
f34 = dev_get_drvdata(&fn->dev);
|
||||
fn = data->f34_container;
|
||||
if (!fn)
|
||||
return -ENODEV;
|
||||
|
||||
return sysfs_emit(buf, "%s\n", f34->configuration_id);
|
||||
}
|
||||
f34 = dev_get_drvdata(&fn->dev);
|
||||
if (!f34)
|
||||
return -ENODEV;
|
||||
|
||||
return 0;
|
||||
|
||||
return sysfs_emit(buf, "%s\n", f34->configuration_id);
|
||||
}
|
||||
|
||||
static DEVICE_ATTR(configuration_id, 0444,
|
||||
@@ -365,10 +360,14 @@ static int rmi_firmware_update(struct rmi_driver_data *data,
|
||||
|
||||
if (!data->f34_container) {
|
||||
dev_warn(dev, "%s: No F34 present!\n", __func__);
|
||||
return -EINVAL;
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
f34 = dev_get_drvdata(&data->f34_container->dev);
|
||||
if (!f34) {
|
||||
dev_warn(dev, "%s: No valid F34 present!\n", __func__);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (f34->bl_version >= 7) {
|
||||
if (data->pdt_props & HAS_BSR) {
|
||||
@@ -494,10 +493,18 @@ static ssize_t rmi_driver_update_fw_status_show(struct device *dev,
|
||||
char *buf)
|
||||
{
|
||||
struct rmi_driver_data *data = dev_get_drvdata(dev);
|
||||
int update_status = 0;
|
||||
struct f34_data *f34;
|
||||
int update_status = -ENODEV;
|
||||
|
||||
if (data->f34_container)
|
||||
update_status = rmi_f34_status(data->f34_container);
|
||||
/*
|
||||
* The status is the percentage complete, or once complete,
|
||||
* zero for success or a negative return code.
|
||||
*/
|
||||
if (data->f34_container) {
|
||||
f34 = dev_get_drvdata(&data->f34_container->dev);
|
||||
if (f34)
|
||||
update_status = f34->update_status;
|
||||
}
|
||||
|
||||
return sysfs_emit(buf, "%d\n", update_status);
|
||||
}
|
||||
@@ -517,33 +524,21 @@ static const struct attribute_group rmi_firmware_attr_group = {
|
||||
.attrs = rmi_firmware_attrs,
|
||||
};
|
||||
|
||||
static int rmi_f34_probe(struct rmi_function *fn)
|
||||
static int rmi_f34v5_probe(struct f34_data *f34)
|
||||
{
|
||||
struct f34_data *f34;
|
||||
unsigned char f34_queries[9];
|
||||
struct rmi_function *fn = f34->fn;
|
||||
u8 f34_queries[9];
|
||||
bool has_config_id;
|
||||
u8 version = fn->fd.function_version;
|
||||
int ret;
|
||||
|
||||
f34 = devm_kzalloc(&fn->dev, sizeof(struct f34_data), GFP_KERNEL);
|
||||
if (!f34)
|
||||
return -ENOMEM;
|
||||
|
||||
f34->fn = fn;
|
||||
dev_set_drvdata(&fn->dev, f34);
|
||||
|
||||
/* v5 code only supported version 0, try V7 probe */
|
||||
if (version > 0)
|
||||
return rmi_f34v7_probe(f34);
|
||||
int error;
|
||||
|
||||
f34->bl_version = 5;
|
||||
|
||||
ret = rmi_read_block(fn->rmi_dev, fn->fd.query_base_addr,
|
||||
f34_queries, sizeof(f34_queries));
|
||||
if (ret) {
|
||||
error = rmi_read_block(fn->rmi_dev, fn->fd.query_base_addr,
|
||||
f34_queries, sizeof(f34_queries));
|
||||
if (error) {
|
||||
dev_err(&fn->dev, "%s: Failed to query properties\n",
|
||||
__func__);
|
||||
return ret;
|
||||
return error;
|
||||
}
|
||||
|
||||
snprintf(f34->bootloader_id, sizeof(f34->bootloader_id),
|
||||
@@ -569,11 +564,11 @@ static int rmi_f34_probe(struct rmi_function *fn)
|
||||
f34->v5.config_blocks);
|
||||
|
||||
if (has_config_id) {
|
||||
ret = rmi_read_block(fn->rmi_dev, fn->fd.control_base_addr,
|
||||
f34_queries, sizeof(f34_queries));
|
||||
if (ret) {
|
||||
error = rmi_read_block(fn->rmi_dev, fn->fd.control_base_addr,
|
||||
f34_queries, sizeof(f34_queries));
|
||||
if (error) {
|
||||
dev_err(&fn->dev, "Failed to read F34 config ID\n");
|
||||
return ret;
|
||||
return error;
|
||||
}
|
||||
|
||||
snprintf(f34->configuration_id, sizeof(f34->configuration_id),
|
||||
@@ -582,12 +577,34 @@ static int rmi_f34_probe(struct rmi_function *fn)
|
||||
f34_queries[2], f34_queries[3]);
|
||||
|
||||
rmi_dbg(RMI_DEBUG_FN, &fn->dev, "Configuration ID: %s\n",
|
||||
f34->configuration_id);
|
||||
f34->configuration_id);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rmi_f34_probe(struct rmi_function *fn)
|
||||
{
|
||||
struct f34_data *f34;
|
||||
u8 version = fn->fd.function_version;
|
||||
int error;
|
||||
|
||||
f34 = devm_kzalloc(&fn->dev, sizeof(struct f34_data), GFP_KERNEL);
|
||||
if (!f34)
|
||||
return -ENOMEM;
|
||||
|
||||
f34->fn = fn;
|
||||
|
||||
/* v5 code only supported version 0 */
|
||||
error = version == 0 ? rmi_f34v5_probe(f34) : rmi_f34v7_probe(f34);
|
||||
if (error)
|
||||
return error;
|
||||
|
||||
dev_set_drvdata(&fn->dev, f34);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int rmi_f34_create_sysfs(struct rmi_device *rmi_dev)
|
||||
{
|
||||
return sysfs_create_group(&rmi_dev->dev.kobj, &rmi_firmware_attr_group);
|
||||
|
||||
@@ -324,7 +324,7 @@ int vsc_tp_rom_xfer(struct vsc_tp *tp, const void *obuf, void *ibuf, size_t len)
|
||||
guard(mutex)(&tp->mutex);
|
||||
|
||||
/* rom xfer is big endian */
|
||||
cpu_to_be32_array((u32 *)tp->tx_buf, obuf, words);
|
||||
cpu_to_be32_array((__be32 *)tp->tx_buf, obuf, words);
|
||||
|
||||
ret = read_poll_timeout(gpiod_get_value_cansleep, ret,
|
||||
!ret, VSC_TP_ROM_XFER_POLL_DELAY_US,
|
||||
@@ -340,7 +340,7 @@ int vsc_tp_rom_xfer(struct vsc_tp *tp, const void *obuf, void *ibuf, size_t len)
|
||||
return ret;
|
||||
|
||||
if (ibuf)
|
||||
be32_to_cpu_array(ibuf, (u32 *)tp->rx_buf, words);
|
||||
be32_to_cpu_array(ibuf, (__be32 *)tp->rx_buf, words);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -227,6 +227,7 @@ static int drv_cp_harray_to_user(void __user *user_buf_uva,
|
||||
static int vmci_host_setup_notify(struct vmci_ctx *context,
|
||||
unsigned long uva)
|
||||
{
|
||||
struct page *page;
|
||||
int retval;
|
||||
|
||||
if (context->notify_page) {
|
||||
@@ -243,13 +244,11 @@ static int vmci_host_setup_notify(struct vmci_ctx *context,
|
||||
/*
|
||||
* Lock physical page backing a given user VA.
|
||||
*/
|
||||
retval = get_user_pages_fast(uva, 1, FOLL_WRITE, &context->notify_page);
|
||||
if (retval != 1) {
|
||||
context->notify_page = NULL;
|
||||
retval = get_user_pages_fast(uva, 1, FOLL_WRITE, &page);
|
||||
if (retval != 1)
|
||||
return VMCI_ERROR_GENERIC;
|
||||
}
|
||||
if (context->notify_page == NULL)
|
||||
return VMCI_ERROR_UNAVAILABLE;
|
||||
|
||||
context->notify_page = page;
|
||||
|
||||
/*
|
||||
* Map the locked page and set up notify pointer.
|
||||
|
||||
@@ -17,6 +17,7 @@
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_domain.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/reset.h>
|
||||
#include <linux/sizes.h>
|
||||
@@ -787,6 +788,29 @@ static void dwcmshc_rk35xx_postinit(struct sdhci_host *host, struct dwcmshc_priv
|
||||
}
|
||||
}
|
||||
|
||||
static void dwcmshc_rk3576_postinit(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
|
||||
{
|
||||
struct device *dev = mmc_dev(host->mmc);
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* This works around the design of the RK3576's power domains, which
|
||||
* makes the PD_NVM power domain, which the sdhci controller on the
|
||||
* RK3576 is in, never come back the same way once it's run-time
|
||||
* suspended once. This can happen during early kernel boot if no driver
|
||||
* is using either PD_NVM or its child power domain PD_SDGMAC for a
|
||||
* short moment, leading to it being turned off to save power. By
|
||||
* keeping it on, sdhci suspending won't lead to PD_NVM becoming a
|
||||
* candidate for getting turned off.
|
||||
*/
|
||||
ret = dev_pm_genpd_rpm_always_on(dev, true);
|
||||
if (ret && ret != -EOPNOTSUPP)
|
||||
dev_warn(dev, "failed to set PD rpm always on, SoC may hang later: %pe\n",
|
||||
ERR_PTR(ret));
|
||||
|
||||
dwcmshc_rk35xx_postinit(host, dwc_priv);
|
||||
}
|
||||
|
||||
static int th1520_execute_tuning(struct sdhci_host *host, u32 opcode)
|
||||
{
|
||||
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
|
||||
@@ -1218,6 +1242,18 @@ static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk35xx_pdata = {
|
||||
.postinit = dwcmshc_rk35xx_postinit,
|
||||
};
|
||||
|
||||
static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk3576_pdata = {
|
||||
.pdata = {
|
||||
.ops = &sdhci_dwcmshc_rk35xx_ops,
|
||||
.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
|
||||
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
|
||||
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
|
||||
SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
|
||||
},
|
||||
.init = dwcmshc_rk35xx_init,
|
||||
.postinit = dwcmshc_rk3576_postinit,
|
||||
};
|
||||
|
||||
static const struct dwcmshc_pltfm_data sdhci_dwcmshc_th1520_pdata = {
|
||||
.pdata = {
|
||||
.ops = &sdhci_dwcmshc_th1520_ops,
|
||||
@@ -1316,6 +1352,10 @@ static const struct of_device_id sdhci_dwcmshc_dt_ids[] = {
|
||||
.compatible = "rockchip,rk3588-dwcmshc",
|
||||
.data = &sdhci_dwcmshc_rk35xx_pdata,
|
||||
},
|
||||
{
|
||||
.compatible = "rockchip,rk3576-dwcmshc",
|
||||
.data = &sdhci_dwcmshc_rk3576_pdata,
|
||||
},
|
||||
{
|
||||
.compatible = "rockchip,rk3568-dwcmshc",
|
||||
.data = &sdhci_dwcmshc_rk35xx_pdata,
|
||||
|
||||
@@ -1326,24 +1326,7 @@ static void b53_adjust_63xx_rgmii(struct dsa_switch *ds, int port,
|
||||
off = B53_RGMII_CTRL_P(port);
|
||||
|
||||
b53_read8(dev, B53_CTRL_PAGE, off, &rgmii_ctrl);
|
||||
|
||||
switch (interface) {
|
||||
case PHY_INTERFACE_MODE_RGMII_ID:
|
||||
rgmii_ctrl |= (RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
|
||||
break;
|
||||
case PHY_INTERFACE_MODE_RGMII_RXID:
|
||||
rgmii_ctrl &= ~(RGMII_CTRL_DLL_TXC);
|
||||
rgmii_ctrl |= RGMII_CTRL_DLL_RXC;
|
||||
break;
|
||||
case PHY_INTERFACE_MODE_RGMII_TXID:
|
||||
rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC);
|
||||
rgmii_ctrl |= RGMII_CTRL_DLL_TXC;
|
||||
break;
|
||||
case PHY_INTERFACE_MODE_RGMII:
|
||||
default:
|
||||
rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
|
||||
break;
|
||||
}
|
||||
rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
|
||||
|
||||
if (port != dev->imp_port) {
|
||||
if (is63268(dev))
|
||||
@@ -1373,8 +1356,7 @@ static void b53_adjust_531x5_rgmii(struct dsa_switch *ds, int port,
|
||||
* tx_clk aligned timing (restoring to reset defaults)
|
||||
*/
|
||||
b53_read8(dev, B53_CTRL_PAGE, off, &rgmii_ctrl);
|
||||
rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC |
|
||||
RGMII_CTRL_TIMING_SEL);
|
||||
rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
|
||||
|
||||
/* PHY_INTERFACE_MODE_RGMII_TXID means TX internal delay, make
|
||||
* sure that we enable the port TX clock internal delay to
|
||||
@@ -1394,7 +1376,10 @@ static void b53_adjust_531x5_rgmii(struct dsa_switch *ds, int port,
|
||||
rgmii_ctrl |= RGMII_CTRL_DLL_TXC;
|
||||
if (interface == PHY_INTERFACE_MODE_RGMII)
|
||||
rgmii_ctrl |= RGMII_CTRL_DLL_TXC | RGMII_CTRL_DLL_RXC;
|
||||
rgmii_ctrl |= RGMII_CTRL_TIMING_SEL;
|
||||
|
||||
if (dev->chip_id != BCM53115_DEVICE_ID)
|
||||
rgmii_ctrl |= RGMII_CTRL_TIMING_SEL;
|
||||
|
||||
b53_write8(dev, B53_CTRL_PAGE, off, rgmii_ctrl);
|
||||
|
||||
dev_info(ds->dev, "Configured port %d for %s\n", port,
|
||||
@@ -1458,6 +1443,10 @@ static void b53_phylink_get_caps(struct dsa_switch *ds, int port,
|
||||
__set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces);
|
||||
__set_bit(PHY_INTERFACE_MODE_REVMII, config->supported_interfaces);
|
||||
|
||||
/* BCM63xx RGMII ports support RGMII */
|
||||
if (is63xx(dev) && in_range(port, B53_63XX_RGMII0, 4))
|
||||
phy_interface_set_rgmii(config->supported_interfaces);
|
||||
|
||||
config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
|
||||
MAC_10 | MAC_100;
|
||||
|
||||
@@ -2047,9 +2036,6 @@ int b53_br_join(struct dsa_switch *ds, int port, struct dsa_bridge bridge,
|
||||
|
||||
b53_get_vlan_entry(dev, pvid, vl);
|
||||
vl->members &= ~BIT(port);
|
||||
if (vl->members == BIT(cpu_port))
|
||||
vl->members &= ~BIT(cpu_port);
|
||||
vl->untag = vl->members;
|
||||
b53_set_vlan_entry(dev, pvid, vl);
|
||||
}
|
||||
|
||||
@@ -2128,8 +2114,7 @@ void b53_br_leave(struct dsa_switch *ds, int port, struct dsa_bridge bridge)
|
||||
}
|
||||
|
||||
b53_get_vlan_entry(dev, pvid, vl);
|
||||
vl->members |= BIT(port) | BIT(cpu_port);
|
||||
vl->untag |= BIT(port) | BIT(cpu_port);
|
||||
vl->members |= BIT(port);
|
||||
b53_set_vlan_entry(dev, pvid, vl);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -2207,7 +2207,7 @@ void gve_handle_report_stats(struct gve_priv *priv)
|
||||
};
|
||||
stats[stats_idx++] = (struct stats) {
|
||||
.stat_name = cpu_to_be32(RX_BUFFERS_POSTED),
|
||||
.value = cpu_to_be64(priv->rx[0].fill_cnt),
|
||||
.value = cpu_to_be64(priv->rx[idx].fill_cnt),
|
||||
.queue_id = cpu_to_be32(idx),
|
||||
};
|
||||
}
|
||||
|
||||
@@ -770,6 +770,9 @@ static int gve_tx_add_skb_dqo(struct gve_tx_ring *tx,
|
||||
s16 completion_tag;
|
||||
|
||||
pkt = gve_alloc_pending_packet(tx);
|
||||
if (!pkt)
|
||||
return -ENOMEM;
|
||||
|
||||
pkt->skb = skb;
|
||||
completion_tag = pkt - tx->dqo.pending_packets;
|
||||
|
||||
|
||||
@@ -1546,8 +1546,8 @@ static void i40e_cleanup_reset_vf(struct i40e_vf *vf)
|
||||
* @vf: pointer to the VF structure
|
||||
* @flr: VFLR was issued or not
|
||||
*
|
||||
* Returns true if the VF is in reset, resets successfully, or resets
|
||||
* are disabled and false otherwise.
|
||||
* Return: True if reset was performed successfully or if resets are disabled.
|
||||
* False if reset is already in progress.
|
||||
**/
|
||||
bool i40e_reset_vf(struct i40e_vf *vf, bool flr)
|
||||
{
|
||||
@@ -1566,7 +1566,7 @@ bool i40e_reset_vf(struct i40e_vf *vf, bool flr)
|
||||
|
||||
/* If VF is being reset already we don't need to continue. */
|
||||
if (test_and_set_bit(I40E_VF_STATE_RESETTING, &vf->vf_states))
|
||||
return true;
|
||||
return false;
|
||||
|
||||
i40e_trigger_vf_reset(vf, flr);
|
||||
|
||||
@@ -4328,7 +4328,10 @@ int i40e_vc_process_vflr_event(struct i40e_pf *pf)
|
||||
reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
|
||||
if (reg & BIT(bit_idx))
|
||||
/* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
|
||||
i40e_reset_vf(vf, true);
|
||||
if (!i40e_reset_vf(vf, true)) {
|
||||
/* At least one VF did not finish resetting, retry next time */
|
||||
set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -2761,6 +2761,27 @@ void ice_map_xdp_rings(struct ice_vsi *vsi)
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_unmap_xdp_rings - Unmap XDP rings from interrupt vectors
|
||||
* @vsi: the VSI with XDP rings being unmapped
|
||||
*/
|
||||
static void ice_unmap_xdp_rings(struct ice_vsi *vsi)
|
||||
{
|
||||
int v_idx;
|
||||
|
||||
ice_for_each_q_vector(vsi, v_idx) {
|
||||
struct ice_q_vector *q_vector = vsi->q_vectors[v_idx];
|
||||
struct ice_tx_ring *ring;
|
||||
|
||||
ice_for_each_tx_ring(ring, q_vector->tx)
|
||||
if (!ring->tx_buf || !ice_ring_is_xdp(ring))
|
||||
break;
|
||||
|
||||
/* restore the value of last node prior to XDP setup */
|
||||
q_vector->tx.tx_ring = ring;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_prepare_xdp_rings - Allocate, configure and setup Tx rings for XDP
|
||||
* @vsi: VSI to bring up Tx rings used by XDP
|
||||
@@ -2824,7 +2845,7 @@ int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog,
|
||||
if (status) {
|
||||
dev_err(dev, "Failed VSI LAN queue config for XDP, error: %d\n",
|
||||
status);
|
||||
goto clear_xdp_rings;
|
||||
goto unmap_xdp_rings;
|
||||
}
|
||||
|
||||
/* assign the prog only when it's not already present on VSI;
|
||||
@@ -2840,6 +2861,8 @@ int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog,
|
||||
ice_vsi_assign_bpf_prog(vsi, prog);
|
||||
|
||||
return 0;
|
||||
unmap_xdp_rings:
|
||||
ice_unmap_xdp_rings(vsi);
|
||||
clear_xdp_rings:
|
||||
ice_for_each_xdp_txq(vsi, i)
|
||||
if (vsi->xdp_rings[i]) {
|
||||
@@ -2856,6 +2879,8 @@ err_map_xdp:
|
||||
mutex_unlock(&pf->avail_q_mutex);
|
||||
|
||||
devm_kfree(dev, vsi->xdp_rings);
|
||||
vsi->xdp_rings = NULL;
|
||||
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
@@ -2871,7 +2896,7 @@ int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type)
|
||||
{
|
||||
u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
|
||||
struct ice_pf *pf = vsi->back;
|
||||
int i, v_idx;
|
||||
int i;
|
||||
|
||||
/* q_vectors are freed in reset path so there's no point in detaching
|
||||
* rings
|
||||
@@ -2879,17 +2904,7 @@ int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type)
|
||||
if (cfg_type == ICE_XDP_CFG_PART)
|
||||
goto free_qmap;
|
||||
|
||||
ice_for_each_q_vector(vsi, v_idx) {
|
||||
struct ice_q_vector *q_vector = vsi->q_vectors[v_idx];
|
||||
struct ice_tx_ring *ring;
|
||||
|
||||
ice_for_each_tx_ring(ring, q_vector->tx)
|
||||
if (!ring->tx_buf || !ice_ring_is_xdp(ring))
|
||||
break;
|
||||
|
||||
/* restore the value of last node prior to XDP setup */
|
||||
q_vector->tx.tx_ring = ring;
|
||||
}
|
||||
ice_unmap_xdp_rings(vsi);
|
||||
|
||||
free_qmap:
|
||||
mutex_lock(&pf->avail_q_mutex);
|
||||
@@ -3034,11 +3049,14 @@ ice_xdp_setup_prog(struct ice_vsi *vsi, struct bpf_prog *prog,
|
||||
xdp_ring_err = ice_vsi_determine_xdp_res(vsi);
|
||||
if (xdp_ring_err) {
|
||||
NL_SET_ERR_MSG_MOD(extack, "Not enough Tx resources for XDP");
|
||||
goto resume_if;
|
||||
} else {
|
||||
xdp_ring_err = ice_prepare_xdp_rings(vsi, prog,
|
||||
ICE_XDP_CFG_FULL);
|
||||
if (xdp_ring_err)
|
||||
if (xdp_ring_err) {
|
||||
NL_SET_ERR_MSG_MOD(extack, "Setting up XDP Tx resources failed");
|
||||
goto resume_if;
|
||||
}
|
||||
}
|
||||
xdp_features_set_redirect_target(vsi->netdev, true);
|
||||
/* reallocate Rx queues that are used for zero-copy */
|
||||
@@ -3056,6 +3074,7 @@ ice_xdp_setup_prog(struct ice_vsi *vsi, struct bpf_prog *prog,
|
||||
NL_SET_ERR_MSG_MOD(extack, "Freeing XDP Rx resources failed");
|
||||
}
|
||||
|
||||
resume_if:
|
||||
if (if_running)
|
||||
ret = ice_up(vsi);
|
||||
|
||||
|
||||
@@ -84,6 +84,27 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_sched_find_next_vsi_node - find the next node for a given VSI
|
||||
* @vsi_node: VSI support node to start search with
|
||||
*
|
||||
* Return: Next VSI support node, or NULL.
|
||||
*
|
||||
* The function returns a pointer to the next node from the VSI layer
|
||||
* assigned to the given VSI, or NULL if there is no such a node.
|
||||
*/
|
||||
static struct ice_sched_node *
|
||||
ice_sched_find_next_vsi_node(struct ice_sched_node *vsi_node)
|
||||
{
|
||||
unsigned int vsi_handle = vsi_node->vsi_handle;
|
||||
|
||||
while ((vsi_node = vsi_node->sibling) != NULL)
|
||||
if (vsi_node->vsi_handle == vsi_handle)
|
||||
break;
|
||||
|
||||
return vsi_node;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
|
||||
* @hw: pointer to the HW struct
|
||||
@@ -1084,8 +1105,10 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
|
||||
if (parent->num_children < max_child_nodes) {
|
||||
new_num_nodes = max_child_nodes - parent->num_children;
|
||||
} else {
|
||||
/* This parent is full, try the next sibling */
|
||||
parent = parent->sibling;
|
||||
/* This parent is full,
|
||||
* try the next available sibling.
|
||||
*/
|
||||
parent = ice_sched_find_next_vsi_node(parent);
|
||||
/* Don't modify the first node TEID memory if the
|
||||
* first node was added already in the above call.
|
||||
* Instead send some temp memory for all other
|
||||
@@ -1528,12 +1551,23 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
|
||||
/* get the first queue group node from VSI sub-tree */
|
||||
qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
|
||||
while (qgrp_node) {
|
||||
struct ice_sched_node *next_vsi_node;
|
||||
|
||||
/* make sure the qgroup node is part of the VSI subtree */
|
||||
if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
|
||||
if (qgrp_node->num_children < max_children &&
|
||||
qgrp_node->owner == owner)
|
||||
break;
|
||||
qgrp_node = qgrp_node->sibling;
|
||||
if (qgrp_node)
|
||||
continue;
|
||||
|
||||
next_vsi_node = ice_sched_find_next_vsi_node(vsi_node);
|
||||
if (!next_vsi_node)
|
||||
break;
|
||||
|
||||
vsi_node = next_vsi_node;
|
||||
qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
|
||||
}
|
||||
|
||||
/* Select the best queue group */
|
||||
@@ -1604,16 +1638,16 @@ ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
|
||||
/**
|
||||
* ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
|
||||
* @hw: pointer to the HW struct
|
||||
* @num_qs: number of queues
|
||||
* @num_new_qs: number of new queues that will be added to the tree
|
||||
* @num_nodes: num nodes array
|
||||
*
|
||||
* This function calculates the number of VSI child nodes based on the
|
||||
* number of queues.
|
||||
*/
|
||||
static void
|
||||
ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
|
||||
ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_new_qs, u16 *num_nodes)
|
||||
{
|
||||
u16 num = num_qs;
|
||||
u16 num = num_new_qs;
|
||||
u8 i, qgl, vsil;
|
||||
|
||||
qgl = ice_sched_get_qgrp_layer(hw);
|
||||
@@ -1779,7 +1813,11 @@ ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
|
||||
if (!parent)
|
||||
return -EIO;
|
||||
|
||||
if (i == vsil)
|
||||
/* Do not modify the VSI handle for already existing VSI nodes,
|
||||
* (if no new VSI node was added to the tree).
|
||||
* Assign the VSI handle only to newly added VSI nodes.
|
||||
*/
|
||||
if (i == vsil && num_added)
|
||||
parent->vsi_handle = vsi_handle;
|
||||
}
|
||||
|
||||
@@ -1812,6 +1850,41 @@ ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
|
||||
num_nodes);
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_sched_recalc_vsi_support_nodes - recalculate VSI support nodes count
|
||||
* @hw: pointer to the HW struct
|
||||
* @vsi_node: pointer to the leftmost VSI node that needs to be extended
|
||||
* @new_numqs: new number of queues that has to be handled by the VSI
|
||||
* @new_num_nodes: pointer to nodes count table to modify the VSI layer entry
|
||||
*
|
||||
* This function recalculates the number of supported nodes that need to
|
||||
* be added after adding more Tx queues for a given VSI.
|
||||
* The number of new VSI support nodes that shall be added will be saved
|
||||
* to the @new_num_nodes table for the VSI layer.
|
||||
*/
|
||||
static void
|
||||
ice_sched_recalc_vsi_support_nodes(struct ice_hw *hw,
|
||||
struct ice_sched_node *vsi_node,
|
||||
unsigned int new_numqs, u16 *new_num_nodes)
|
||||
{
|
||||
u32 vsi_nodes_cnt = 1;
|
||||
u32 max_queue_cnt = 1;
|
||||
u32 qgl, vsil;
|
||||
|
||||
qgl = ice_sched_get_qgrp_layer(hw);
|
||||
vsil = ice_sched_get_vsi_layer(hw);
|
||||
|
||||
for (u32 i = vsil; i <= qgl; i++)
|
||||
max_queue_cnt *= hw->max_children[i];
|
||||
|
||||
while ((vsi_node = ice_sched_find_next_vsi_node(vsi_node)) != NULL)
|
||||
vsi_nodes_cnt++;
|
||||
|
||||
if (new_numqs > (max_queue_cnt * vsi_nodes_cnt))
|
||||
new_num_nodes[vsil] = DIV_ROUND_UP(new_numqs, max_queue_cnt) -
|
||||
vsi_nodes_cnt;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_sched_update_vsi_child_nodes - update VSI child nodes
|
||||
* @pi: port information structure
|
||||
@@ -1863,15 +1936,25 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
|
||||
return status;
|
||||
}
|
||||
|
||||
if (new_numqs)
|
||||
ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
|
||||
/* Keep the max number of queue configuration all the time. Update the
|
||||
* tree only if number of queues > previous number of queues. This may
|
||||
ice_sched_recalc_vsi_support_nodes(hw, vsi_node,
|
||||
new_numqs, new_num_nodes);
|
||||
ice_sched_calc_vsi_child_nodes(hw, new_numqs - prev_numqs,
|
||||
new_num_nodes);
|
||||
|
||||
/* Never decrease the number of queues in the tree. Update the tree
|
||||
* only if number of queues > previous number of queues. This may
|
||||
* leave some extra nodes in the tree if number of queues < previous
|
||||
* number but that wouldn't harm anything. Removing those extra nodes
|
||||
* may complicate the code if those nodes are part of SRL or
|
||||
* individually rate limited.
|
||||
* Also, add the required VSI support nodes if the existing ones cannot
|
||||
* handle the requested new number of queues.
|
||||
*/
|
||||
status = ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
|
||||
new_num_nodes);
|
||||
if (status)
|
||||
return status;
|
||||
|
||||
status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,
|
||||
new_num_nodes, owner);
|
||||
if (status)
|
||||
@@ -2012,6 +2095,58 @@ static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
|
||||
return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF);
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_sched_rm_vsi_subtree - remove all nodes assigned to a given VSI
|
||||
* @pi: port information structure
|
||||
* @vsi_node: pointer to the leftmost node of the VSI to be removed
|
||||
* @owner: LAN or RDMA
|
||||
* @tc: TC number
|
||||
*
|
||||
* Return: Zero in case of success, or -EBUSY if the VSI has leaf nodes in TC.
|
||||
*
|
||||
* This function removes all the VSI support nodes associated with a given VSI
|
||||
* and its LAN or RDMA children nodes from the scheduler tree.
|
||||
*/
|
||||
static int
|
||||
ice_sched_rm_vsi_subtree(struct ice_port_info *pi,
|
||||
struct ice_sched_node *vsi_node, u8 owner, u8 tc)
|
||||
{
|
||||
u16 vsi_handle = vsi_node->vsi_handle;
|
||||
bool all_vsi_nodes_removed = true;
|
||||
int j = 0;
|
||||
|
||||
while (vsi_node) {
|
||||
struct ice_sched_node *next_vsi_node;
|
||||
|
||||
if (ice_sched_is_leaf_node_present(vsi_node)) {
|
||||
ice_debug(pi->hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", tc);
|
||||
return -EBUSY;
|
||||
}
|
||||
while (j < vsi_node->num_children) {
|
||||
if (vsi_node->children[j]->owner == owner)
|
||||
ice_free_sched_node(pi, vsi_node->children[j]);
|
||||
else
|
||||
j++;
|
||||
}
|
||||
|
||||
next_vsi_node = ice_sched_find_next_vsi_node(vsi_node);
|
||||
|
||||
/* remove the VSI if it has no children */
|
||||
if (!vsi_node->num_children)
|
||||
ice_free_sched_node(pi, vsi_node);
|
||||
else
|
||||
all_vsi_nodes_removed = false;
|
||||
|
||||
vsi_node = next_vsi_node;
|
||||
}
|
||||
|
||||
/* clean up aggregator related VSI info if any */
|
||||
if (all_vsi_nodes_removed)
|
||||
ice_sched_rm_agg_vsi_info(pi, vsi_handle);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
|
||||
* @pi: port information structure
|
||||
@@ -2038,7 +2173,6 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
|
||||
|
||||
ice_for_each_traffic_class(i) {
|
||||
struct ice_sched_node *vsi_node, *tc_node;
|
||||
u8 j = 0;
|
||||
|
||||
tc_node = ice_sched_get_tc_node(pi, i);
|
||||
if (!tc_node)
|
||||
@@ -2048,31 +2182,12 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
|
||||
if (!vsi_node)
|
||||
continue;
|
||||
|
||||
if (ice_sched_is_leaf_node_present(vsi_node)) {
|
||||
ice_debug(pi->hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", i);
|
||||
status = -EBUSY;
|
||||
status = ice_sched_rm_vsi_subtree(pi, vsi_node, owner, i);
|
||||
if (status)
|
||||
goto exit_sched_rm_vsi_cfg;
|
||||
}
|
||||
while (j < vsi_node->num_children) {
|
||||
if (vsi_node->children[j]->owner == owner) {
|
||||
ice_free_sched_node(pi, vsi_node->children[j]);
|
||||
|
||||
/* reset the counter again since the num
|
||||
* children will be updated after node removal
|
||||
*/
|
||||
j = 0;
|
||||
} else {
|
||||
j++;
|
||||
}
|
||||
}
|
||||
/* remove the VSI if it has no children */
|
||||
if (!vsi_node->num_children) {
|
||||
ice_free_sched_node(pi, vsi_node);
|
||||
vsi_ctx->sched.vsi_node[i] = NULL;
|
||||
vsi_ctx->sched.vsi_node[i] = NULL;
|
||||
|
||||
/* clean up aggregator related VSI info if any */
|
||||
ice_sched_rm_agg_vsi_info(pi, vsi_handle);
|
||||
}
|
||||
if (owner == ICE_SCHED_NODE_OWNER_LAN)
|
||||
vsi_ctx->sched.max_lanq[i] = 0;
|
||||
else
|
||||
|
||||
@@ -1802,11 +1802,19 @@ void idpf_vc_event_task(struct work_struct *work)
|
||||
if (test_bit(IDPF_REMOVE_IN_PROG, adapter->flags))
|
||||
return;
|
||||
|
||||
if (test_bit(IDPF_HR_FUNC_RESET, adapter->flags) ||
|
||||
test_bit(IDPF_HR_DRV_LOAD, adapter->flags)) {
|
||||
set_bit(IDPF_HR_RESET_IN_PROG, adapter->flags);
|
||||
idpf_init_hard_reset(adapter);
|
||||
}
|
||||
if (test_bit(IDPF_HR_FUNC_RESET, adapter->flags))
|
||||
goto func_reset;
|
||||
|
||||
if (test_bit(IDPF_HR_DRV_LOAD, adapter->flags))
|
||||
goto drv_load;
|
||||
|
||||
return;
|
||||
|
||||
func_reset:
|
||||
idpf_vc_xn_shutdown(adapter->vcxn_mngr);
|
||||
drv_load:
|
||||
set_bit(IDPF_HR_RESET_IN_PROG, adapter->flags);
|
||||
idpf_init_hard_reset(adapter);
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@@ -362,17 +362,18 @@ netdev_tx_t idpf_tx_singleq_frame(struct sk_buff *skb,
|
||||
{
|
||||
struct idpf_tx_offload_params offload = { };
|
||||
struct idpf_tx_buf *first;
|
||||
int csum, tso, needed;
|
||||
unsigned int count;
|
||||
__be16 protocol;
|
||||
int csum, tso;
|
||||
|
||||
count = idpf_tx_desc_count_required(tx_q, skb);
|
||||
if (unlikely(!count))
|
||||
return idpf_tx_drop_skb(tx_q, skb);
|
||||
|
||||
if (idpf_tx_maybe_stop_common(tx_q,
|
||||
count + IDPF_TX_DESCS_PER_CACHE_LINE +
|
||||
IDPF_TX_DESCS_FOR_CTX)) {
|
||||
needed = count + IDPF_TX_DESCS_PER_CACHE_LINE + IDPF_TX_DESCS_FOR_CTX;
|
||||
if (!netif_subqueue_maybe_stop(tx_q->netdev, tx_q->idx,
|
||||
IDPF_DESC_UNUSED(tx_q),
|
||||
needed, needed)) {
|
||||
idpf_tx_buf_hw_update(tx_q, tx_q->next_to_use, false);
|
||||
|
||||
u64_stats_update_begin(&tx_q->stats_sync);
|
||||
|
||||
@@ -2132,6 +2132,19 @@ void idpf_tx_splitq_build_flow_desc(union idpf_tx_flex_desc *desc,
|
||||
desc->flow.qw1.compl_tag = cpu_to_le16(params->compl_tag);
|
||||
}
|
||||
|
||||
/* Global conditions to tell whether the txq (and related resources)
|
||||
* has room to allow the use of "size" descriptors.
|
||||
*/
|
||||
static int idpf_txq_has_room(struct idpf_tx_queue *tx_q, u32 size)
|
||||
{
|
||||
if (IDPF_DESC_UNUSED(tx_q) < size ||
|
||||
IDPF_TX_COMPLQ_PENDING(tx_q->txq_grp) >
|
||||
IDPF_TX_COMPLQ_OVERFLOW_THRESH(tx_q->txq_grp->complq) ||
|
||||
IDPF_TX_BUF_RSV_LOW(tx_q))
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* idpf_tx_maybe_stop_splitq - 1st level check for Tx splitq stop conditions
|
||||
* @tx_q: the queue to be checked
|
||||
@@ -2142,29 +2155,11 @@ void idpf_tx_splitq_build_flow_desc(union idpf_tx_flex_desc *desc,
|
||||
static int idpf_tx_maybe_stop_splitq(struct idpf_tx_queue *tx_q,
|
||||
unsigned int descs_needed)
|
||||
{
|
||||
if (idpf_tx_maybe_stop_common(tx_q, descs_needed))
|
||||
goto out;
|
||||
if (netif_subqueue_maybe_stop(tx_q->netdev, tx_q->idx,
|
||||
idpf_txq_has_room(tx_q, descs_needed),
|
||||
1, 1))
|
||||
return 0;
|
||||
|
||||
/* If there are too many outstanding completions expected on the
|
||||
* completion queue, stop the TX queue to give the device some time to
|
||||
* catch up
|
||||
*/
|
||||
if (unlikely(IDPF_TX_COMPLQ_PENDING(tx_q->txq_grp) >
|
||||
IDPF_TX_COMPLQ_OVERFLOW_THRESH(tx_q->txq_grp->complq)))
|
||||
goto splitq_stop;
|
||||
|
||||
/* Also check for available book keeping buffers; if we are low, stop
|
||||
* the queue to wait for more completions
|
||||
*/
|
||||
if (unlikely(IDPF_TX_BUF_RSV_LOW(tx_q)))
|
||||
goto splitq_stop;
|
||||
|
||||
return 0;
|
||||
|
||||
splitq_stop:
|
||||
netif_stop_subqueue(tx_q->netdev, tx_q->idx);
|
||||
|
||||
out:
|
||||
u64_stats_update_begin(&tx_q->stats_sync);
|
||||
u64_stats_inc(&tx_q->q_stats.q_busy);
|
||||
u64_stats_update_end(&tx_q->stats_sync);
|
||||
@@ -2190,12 +2185,6 @@ void idpf_tx_buf_hw_update(struct idpf_tx_queue *tx_q, u32 val,
|
||||
nq = netdev_get_tx_queue(tx_q->netdev, tx_q->idx);
|
||||
tx_q->next_to_use = val;
|
||||
|
||||
if (idpf_tx_maybe_stop_common(tx_q, IDPF_TX_DESC_NEEDED)) {
|
||||
u64_stats_update_begin(&tx_q->stats_sync);
|
||||
u64_stats_inc(&tx_q->q_stats.q_busy);
|
||||
u64_stats_update_end(&tx_q->stats_sync);
|
||||
}
|
||||
|
||||
/* Force memory writes to complete before letting h/w
|
||||
* know there are new descriptors to fetch. (Only
|
||||
* applicable for weak-ordered memory model archs,
|
||||
|
||||
@@ -1052,12 +1052,4 @@ bool idpf_rx_singleq_buf_hw_alloc_all(struct idpf_rx_queue *rxq,
|
||||
u16 cleaned_count);
|
||||
int idpf_tso(struct sk_buff *skb, struct idpf_tx_offload_params *off);
|
||||
|
||||
static inline bool idpf_tx_maybe_stop_common(struct idpf_tx_queue *tx_q,
|
||||
u32 needed)
|
||||
{
|
||||
return !netif_subqueue_maybe_stop(tx_q->netdev, tx_q->idx,
|
||||
IDPF_DESC_UNUSED(tx_q),
|
||||
needed, needed);
|
||||
}
|
||||
|
||||
#endif /* !_IDPF_TXRX_H_ */
|
||||
|
||||
@@ -376,7 +376,7 @@ static void idpf_vc_xn_init(struct idpf_vc_xn_manager *vcxn_mngr)
|
||||
* All waiting threads will be woken-up and their transaction aborted. Further
|
||||
* operations on that object will fail.
|
||||
*/
|
||||
static void idpf_vc_xn_shutdown(struct idpf_vc_xn_manager *vcxn_mngr)
|
||||
void idpf_vc_xn_shutdown(struct idpf_vc_xn_manager *vcxn_mngr)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
||||
@@ -66,5 +66,6 @@ int idpf_send_get_stats_msg(struct idpf_vport *vport);
|
||||
int idpf_send_set_sriov_vfs_msg(struct idpf_adapter *adapter, u16 num_vfs);
|
||||
int idpf_send_get_set_rss_key_msg(struct idpf_vport *vport, bool get);
|
||||
int idpf_send_get_set_rss_lut_msg(struct idpf_vport *vport, bool get);
|
||||
void idpf_vc_xn_shutdown(struct idpf_vc_xn_manager *vcxn_mngr);
|
||||
|
||||
#endif /* _IDPF_VIRTCHNL_H_ */
|
||||
|
||||
@@ -1468,6 +1468,8 @@ static __maybe_unused int mtk_star_suspend(struct device *dev)
|
||||
if (netif_running(ndev))
|
||||
mtk_star_disable(ndev);
|
||||
|
||||
netif_device_detach(ndev);
|
||||
|
||||
clk_bulk_disable_unprepare(MTK_STAR_NCLKS, priv->clks);
|
||||
|
||||
return 0;
|
||||
@@ -1492,6 +1494,8 @@ static __maybe_unused int mtk_star_resume(struct device *dev)
|
||||
clk_bulk_disable_unprepare(MTK_STAR_NCLKS, priv->clks);
|
||||
}
|
||||
|
||||
netif_device_attach(ndev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@@ -249,7 +249,7 @@ static const struct ptp_clock_info mlx4_en_ptp_clock_info = {
|
||||
static u32 freq_to_shift(u16 freq)
|
||||
{
|
||||
u32 freq_khz = freq * 1000;
|
||||
u64 max_val_cycles = freq_khz * 1000 * MLX4_EN_WRAP_AROUND_SEC;
|
||||
u64 max_val_cycles = freq_khz * 1000ULL * MLX4_EN_WRAP_AROUND_SEC;
|
||||
u64 max_val_cycles_rounded = 1ULL << fls64(max_val_cycles - 1);
|
||||
/* calculate max possible multiplier in order to fit in 64bit */
|
||||
u64 max_mul = div64_u64(ULLONG_MAX, max_val_cycles_rounded);
|
||||
|
||||
@@ -2028,9 +2028,8 @@ err_out:
|
||||
return err;
|
||||
}
|
||||
|
||||
static bool mlx5_flow_has_geneve_opt(struct mlx5e_tc_flow *flow)
|
||||
static bool mlx5_flow_has_geneve_opt(struct mlx5_flow_spec *spec)
|
||||
{
|
||||
struct mlx5_flow_spec *spec = &flow->attr->parse_attr->spec;
|
||||
void *headers_v = MLX5_ADDR_OF(fte_match_param,
|
||||
spec->match_value,
|
||||
misc_parameters_3);
|
||||
@@ -2069,7 +2068,7 @@ static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
|
||||
}
|
||||
complete_all(&flow->del_hw_done);
|
||||
|
||||
if (mlx5_flow_has_geneve_opt(flow))
|
||||
if (mlx5_flow_has_geneve_opt(&attr->parse_attr->spec))
|
||||
mlx5_geneve_tlv_option_del(priv->mdev->geneve);
|
||||
|
||||
if (flow->decap_route)
|
||||
@@ -2574,12 +2573,13 @@ static int parse_tunnel_attr(struct mlx5e_priv *priv,
|
||||
|
||||
err = mlx5e_tc_tun_parse(filter_dev, priv, tmp_spec, f, match_level);
|
||||
if (err) {
|
||||
kvfree(tmp_spec);
|
||||
NL_SET_ERR_MSG_MOD(extack, "Failed to parse tunnel attributes");
|
||||
netdev_warn(priv->netdev, "Failed to parse tunnel attributes");
|
||||
return err;
|
||||
} else {
|
||||
err = mlx5e_tc_set_attr_rx_tun(flow, tmp_spec);
|
||||
}
|
||||
err = mlx5e_tc_set_attr_rx_tun(flow, tmp_spec);
|
||||
if (mlx5_flow_has_geneve_opt(tmp_spec))
|
||||
mlx5_geneve_tlv_option_del(priv->mdev->geneve);
|
||||
kvfree(tmp_spec);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
@@ -1295,12 +1295,15 @@ mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,
|
||||
ret = mlx5_eswitch_load_pf_vf_vport(esw, MLX5_VPORT_ECPF, enabled_events);
|
||||
if (ret)
|
||||
goto ecpf_err;
|
||||
if (mlx5_core_ec_sriov_enabled(esw->dev)) {
|
||||
ret = mlx5_eswitch_load_ec_vf_vports(esw, esw->esw_funcs.num_ec_vfs,
|
||||
enabled_events);
|
||||
if (ret)
|
||||
goto ec_vf_err;
|
||||
}
|
||||
}
|
||||
|
||||
/* Enable ECVF vports */
|
||||
if (mlx5_core_ec_sriov_enabled(esw->dev)) {
|
||||
ret = mlx5_eswitch_load_ec_vf_vports(esw,
|
||||
esw->esw_funcs.num_ec_vfs,
|
||||
enabled_events);
|
||||
if (ret)
|
||||
goto ec_vf_err;
|
||||
}
|
||||
|
||||
/* Enable VF vports */
|
||||
@@ -1331,9 +1334,11 @@ void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw)
|
||||
{
|
||||
mlx5_eswitch_unload_vf_vports(esw, esw->esw_funcs.num_vfs);
|
||||
|
||||
if (mlx5_core_ec_sriov_enabled(esw->dev))
|
||||
mlx5_eswitch_unload_ec_vf_vports(esw,
|
||||
esw->esw_funcs.num_ec_vfs);
|
||||
|
||||
if (mlx5_ecpf_vport_exists(esw->dev)) {
|
||||
if (mlx5_core_ec_sriov_enabled(esw->dev))
|
||||
mlx5_eswitch_unload_ec_vf_vports(esw, esw->esw_funcs.num_vfs);
|
||||
mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_ECPF);
|
||||
}
|
||||
|
||||
|
||||
@@ -2200,6 +2200,7 @@ try_add_to_existing_fg(struct mlx5_flow_table *ft,
|
||||
struct mlx5_flow_handle *rule;
|
||||
struct match_list *iter;
|
||||
bool take_write = false;
|
||||
bool try_again = false;
|
||||
struct fs_fte *fte;
|
||||
u64 version = 0;
|
||||
int err;
|
||||
@@ -2264,6 +2265,7 @@ skip_search:
|
||||
nested_down_write_ref_node(&g->node, FS_LOCK_PARENT);
|
||||
|
||||
if (!g->node.active) {
|
||||
try_again = true;
|
||||
up_write_ref_node(&g->node, false);
|
||||
continue;
|
||||
}
|
||||
@@ -2285,7 +2287,8 @@ skip_search:
|
||||
tree_put_node(&fte->node, false);
|
||||
return rule;
|
||||
}
|
||||
rule = ERR_PTR(-ENOENT);
|
||||
err = try_again ? -EAGAIN : -ENOENT;
|
||||
rule = ERR_PTR(err);
|
||||
out:
|
||||
kmem_cache_free(steering->ftes_cache, fte);
|
||||
return rule;
|
||||
|
||||
@@ -291,7 +291,7 @@ static void free_4k(struct mlx5_core_dev *dev, u64 addr, u32 function)
|
||||
static int alloc_system_page(struct mlx5_core_dev *dev, u32 function)
|
||||
{
|
||||
struct device *device = mlx5_core_dma_dev(dev);
|
||||
int nid = dev_to_node(device);
|
||||
int nid = dev->priv.numa_node;
|
||||
struct page *page;
|
||||
u64 zero_addr = 1;
|
||||
u64 addr;
|
||||
|
||||
@@ -558,6 +558,9 @@ hws_definer_conv_outer(struct mlx5hws_definer_conv_data *cd,
|
||||
HWS_SET_HDR(fc, match_param, IP_PROTOCOL_O,
|
||||
outer_headers.ip_protocol,
|
||||
eth_l3_outer.protocol_next_header);
|
||||
HWS_SET_HDR(fc, match_param, IP_VERSION_O,
|
||||
outer_headers.ip_version,
|
||||
eth_l3_outer.ip_version);
|
||||
HWS_SET_HDR(fc, match_param, IP_TTL_O,
|
||||
outer_headers.ttl_hoplimit,
|
||||
eth_l3_outer.time_to_live_hop_limit);
|
||||
|
||||
@@ -880,6 +880,7 @@ static int lan966x_probe_port(struct lan966x *lan966x, u32 p,
|
||||
lan966x_vlan_port_set_vlan_aware(port, 0);
|
||||
lan966x_vlan_port_set_vid(port, HOST_PVID, false, false);
|
||||
lan966x_vlan_port_apply(port);
|
||||
lan966x_vlan_port_rew_host(port);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -497,6 +497,7 @@ void lan966x_vlan_port_apply(struct lan966x_port *port);
|
||||
bool lan966x_vlan_cpu_member_cpu_vlan_mask(struct lan966x *lan966x, u16 vid);
|
||||
void lan966x_vlan_port_set_vlan_aware(struct lan966x_port *port,
|
||||
bool vlan_aware);
|
||||
void lan966x_vlan_port_rew_host(struct lan966x_port *port);
|
||||
int lan966x_vlan_port_set_vid(struct lan966x_port *port,
|
||||
u16 vid,
|
||||
bool pvid,
|
||||
|
||||
@@ -297,6 +297,7 @@ static void lan966x_port_bridge_leave(struct lan966x_port *port,
|
||||
lan966x_vlan_port_set_vlan_aware(port, false);
|
||||
lan966x_vlan_port_set_vid(port, HOST_PVID, false, false);
|
||||
lan966x_vlan_port_apply(port);
|
||||
lan966x_vlan_port_rew_host(port);
|
||||
}
|
||||
|
||||
int lan966x_port_changeupper(struct net_device *dev,
|
||||
|
||||
@@ -149,6 +149,27 @@ void lan966x_vlan_port_set_vlan_aware(struct lan966x_port *port,
|
||||
port->vlan_aware = vlan_aware;
|
||||
}
|
||||
|
||||
/* When the interface is in host mode, the interface should not be vlan aware
|
||||
* but it should insert all the tags that it gets from the network stack.
|
||||
* The tags are not in the data of the frame but actually in the skb and the ifh
|
||||
* is configured already to get this tag. So what we need to do is to update the
|
||||
* rewriter to insert the vlan tag for all frames which have a vlan tag
|
||||
* different than 0.
|
||||
*/
|
||||
void lan966x_vlan_port_rew_host(struct lan966x_port *port)
|
||||
{
|
||||
struct lan966x *lan966x = port->lan966x;
|
||||
u32 val;
|
||||
|
||||
/* Tag all frames except when VID=0*/
|
||||
val = REW_TAG_CFG_TAG_CFG_SET(2);
|
||||
|
||||
/* Update only some bits in the register */
|
||||
lan_rmw(val,
|
||||
REW_TAG_CFG_TAG_CFG,
|
||||
lan966x, REW_TAG_CFG(port->chip_port));
|
||||
}
|
||||
|
||||
void lan966x_vlan_port_apply(struct lan966x_port *port)
|
||||
{
|
||||
struct lan966x *lan966x = port->lan966x;
|
||||
|
||||
@@ -32,6 +32,11 @@ static int est_configure(struct stmmac_priv *priv, struct stmmac_est *cfg,
|
||||
int i, ret = 0;
|
||||
u32 ctrl;
|
||||
|
||||
if (!ptp_rate) {
|
||||
netdev_warn(priv->dev, "Invalid PTP rate");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret |= est_write(est_addr, EST_BTR_LOW, cfg->btr[0], false);
|
||||
ret |= est_write(est_addr, EST_BTR_HIGH, cfg->btr[1], false);
|
||||
ret |= est_write(est_addr, EST_TER, cfg->ter, false);
|
||||
|
||||
@@ -835,6 +835,11 @@ int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags)
|
||||
if (!(priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp))
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
if (!priv->plat->clk_ptp_rate) {
|
||||
netdev_err(priv->dev, "Invalid PTP clock rate");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
stmmac_config_hw_tstamping(priv, priv->ptpaddr, systime_flags);
|
||||
priv->systime_flags = systime_flags;
|
||||
|
||||
|
||||
@@ -419,6 +419,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct plat_stmmacenet_data *plat;
|
||||
struct stmmac_dma_cfg *dma_cfg;
|
||||
static int bus_id = -ENODEV;
|
||||
int phy_mode;
|
||||
void *ret;
|
||||
int rc;
|
||||
@@ -454,8 +455,14 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
|
||||
of_property_read_u32(np, "max-speed", &plat->max_speed);
|
||||
|
||||
plat->bus_id = of_alias_get_id(np, "ethernet");
|
||||
if (plat->bus_id < 0)
|
||||
plat->bus_id = 0;
|
||||
if (plat->bus_id < 0) {
|
||||
if (bus_id < 0)
|
||||
bus_id = of_alias_get_highest_id("ethernet");
|
||||
/* No ethernet alias found, init at -1 so first bus_id is 0 */
|
||||
if (bus_id < 0)
|
||||
bus_id = -1;
|
||||
plat->bus_id = ++bus_id;
|
||||
}
|
||||
|
||||
/* Default to phy auto-detection */
|
||||
plat->phy_addr = -1;
|
||||
|
||||
@@ -303,7 +303,7 @@ void stmmac_ptp_register(struct stmmac_priv *priv)
|
||||
|
||||
/* Calculate the clock domain crossing (CDC) error if necessary */
|
||||
priv->plat->cdc_error_adj = 0;
|
||||
if (priv->plat->has_gmac4 && priv->plat->clk_ptp_rate)
|
||||
if (priv->plat->has_gmac4)
|
||||
priv->plat->cdc_error_adj = (2 * NSEC_PER_SEC) / priv->plat->clk_ptp_rate;
|
||||
|
||||
stmmac_ptp_clock_ops.n_per_out = priv->dma_cap.pps_out_num;
|
||||
|
||||
@@ -29,6 +29,14 @@ void emac_update_hardware_stats(struct prueth_emac *emac)
|
||||
spin_lock(&prueth->stats_lock);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(icssg_all_miig_stats); i++) {
|
||||
/* In MII mode TX lines are swapped inside ICSSG, so read Tx stats
|
||||
* from slice1 for port0 and slice0 for port1 to get accurate Tx
|
||||
* stats for a given port
|
||||
*/
|
||||
if (emac->phy_if == PHY_INTERFACE_MODE_MII &&
|
||||
icssg_all_miig_stats[i].offset >= ICSSG_TX_PACKET_OFFSET &&
|
||||
icssg_all_miig_stats[i].offset <= ICSSG_TX_BYTE_OFFSET)
|
||||
base = stats_base[slice ^ 1];
|
||||
regmap_read(prueth->miig_rt,
|
||||
base + icssg_all_miig_stats[i].offset,
|
||||
&val);
|
||||
|
||||
@@ -246,15 +246,39 @@ static sci_t make_sci(const u8 *addr, __be16 port)
|
||||
return sci;
|
||||
}
|
||||
|
||||
static sci_t macsec_frame_sci(struct macsec_eth_header *hdr, bool sci_present)
|
||||
static sci_t macsec_active_sci(struct macsec_secy *secy)
|
||||
{
|
||||
sci_t sci;
|
||||
struct macsec_rx_sc *rx_sc = rcu_dereference_bh(secy->rx_sc);
|
||||
|
||||
if (sci_present)
|
||||
/* Case single RX SC */
|
||||
if (rx_sc && !rcu_dereference_bh(rx_sc->next))
|
||||
return (rx_sc->active) ? rx_sc->sci : 0;
|
||||
/* Case no RX SC or multiple */
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static sci_t macsec_frame_sci(struct macsec_eth_header *hdr, bool sci_present,
|
||||
struct macsec_rxh_data *rxd)
|
||||
{
|
||||
struct macsec_dev *macsec;
|
||||
sci_t sci = 0;
|
||||
|
||||
/* SC = 1 */
|
||||
if (sci_present) {
|
||||
memcpy(&sci, hdr->secure_channel_id,
|
||||
sizeof(hdr->secure_channel_id));
|
||||
else
|
||||
/* SC = 0; ES = 0 */
|
||||
} else if ((!(hdr->tci_an & (MACSEC_TCI_ES | MACSEC_TCI_SC))) &&
|
||||
(list_is_singular(&rxd->secys))) {
|
||||
/* Only one SECY should exist on this scenario */
|
||||
macsec = list_first_or_null_rcu(&rxd->secys, struct macsec_dev,
|
||||
secys);
|
||||
if (macsec)
|
||||
return macsec_active_sci(&macsec->secy);
|
||||
} else {
|
||||
sci = make_sci(hdr->eth.h_source, MACSEC_PORT_ES);
|
||||
}
|
||||
|
||||
return sci;
|
||||
}
|
||||
@@ -1108,7 +1132,7 @@ static rx_handler_result_t macsec_handle_frame(struct sk_buff **pskb)
|
||||
struct macsec_rxh_data *rxd;
|
||||
struct macsec_dev *macsec;
|
||||
unsigned int len;
|
||||
sci_t sci;
|
||||
sci_t sci = 0;
|
||||
u32 hdr_pn;
|
||||
bool cbit;
|
||||
struct pcpu_rx_sc_stats *rxsc_stats;
|
||||
@@ -1155,11 +1179,14 @@ static rx_handler_result_t macsec_handle_frame(struct sk_buff **pskb)
|
||||
|
||||
macsec_skb_cb(skb)->has_sci = !!(hdr->tci_an & MACSEC_TCI_SC);
|
||||
macsec_skb_cb(skb)->assoc_num = hdr->tci_an & MACSEC_AN_MASK;
|
||||
sci = macsec_frame_sci(hdr, macsec_skb_cb(skb)->has_sci);
|
||||
|
||||
rcu_read_lock();
|
||||
rxd = macsec_data_rcu(skb->dev);
|
||||
|
||||
sci = macsec_frame_sci(hdr, macsec_skb_cb(skb)->has_sci, rxd);
|
||||
if (!sci)
|
||||
goto drop_nosc;
|
||||
|
||||
list_for_each_entry_rcu(macsec, &rxd->secys, secys) {
|
||||
struct macsec_rx_sc *sc = find_rx_sc(&macsec->secy, sci);
|
||||
|
||||
@@ -1282,6 +1309,7 @@ drop:
|
||||
macsec_rxsa_put(rx_sa);
|
||||
drop_nosa:
|
||||
macsec_rxsc_put(rx_sc);
|
||||
drop_nosc:
|
||||
rcu_read_unlock();
|
||||
drop_direct:
|
||||
kfree_skb(skb);
|
||||
|
||||
@@ -353,7 +353,8 @@ static int nsim_poll(struct napi_struct *napi, int budget)
|
||||
int done;
|
||||
|
||||
done = nsim_rcv(rq, budget);
|
||||
napi_complete(napi);
|
||||
if (done < budget)
|
||||
napi_complete_done(napi, done);
|
||||
|
||||
return done;
|
||||
}
|
||||
|
||||
@@ -889,6 +889,9 @@ int __mdiobus_read(struct mii_bus *bus, int addr, u32 regnum)
|
||||
|
||||
lockdep_assert_held_once(&bus->mdio_lock);
|
||||
|
||||
if (addr >= PHY_MAX_ADDR)
|
||||
return -ENXIO;
|
||||
|
||||
if (bus->read)
|
||||
retval = bus->read(bus, addr, regnum);
|
||||
else
|
||||
@@ -918,6 +921,9 @@ int __mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val)
|
||||
|
||||
lockdep_assert_held_once(&bus->mdio_lock);
|
||||
|
||||
if (addr >= PHY_MAX_ADDR)
|
||||
return -ENXIO;
|
||||
|
||||
if (bus->write)
|
||||
err = bus->write(bus, addr, regnum, val);
|
||||
else
|
||||
@@ -979,6 +985,9 @@ int __mdiobus_c45_read(struct mii_bus *bus, int addr, int devad, u32 regnum)
|
||||
|
||||
lockdep_assert_held_once(&bus->mdio_lock);
|
||||
|
||||
if (addr >= PHY_MAX_ADDR)
|
||||
return -ENXIO;
|
||||
|
||||
if (bus->read_c45)
|
||||
retval = bus->read_c45(bus, addr, devad, regnum);
|
||||
else
|
||||
@@ -1010,6 +1019,9 @@ int __mdiobus_c45_write(struct mii_bus *bus, int addr, int devad, u32 regnum,
|
||||
|
||||
lockdep_assert_held_once(&bus->mdio_lock);
|
||||
|
||||
if (addr >= PHY_MAX_ADDR)
|
||||
return -ENXIO;
|
||||
|
||||
if (bus->write_c45)
|
||||
err = bus->write_c45(bus, addr, devad, regnum, val);
|
||||
else
|
||||
|
||||
@@ -31,11 +31,11 @@ static int aqc111_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
|
||||
USB_RECIP_DEVICE, value, index, data, size);
|
||||
|
||||
if (unlikely(ret < size)) {
|
||||
ret = ret < 0 ? ret : -ENODATA;
|
||||
|
||||
netdev_warn(dev->net,
|
||||
"Failed to read(0x%x) reg index 0x%04x: %d\n",
|
||||
cmd, index, ret);
|
||||
|
||||
ret = ret < 0 ? ret : -ENODATA;
|
||||
}
|
||||
|
||||
return ret;
|
||||
@@ -50,11 +50,11 @@ static int aqc111_read_cmd(struct usbnet *dev, u8 cmd, u16 value,
|
||||
USB_RECIP_DEVICE, value, index, data, size);
|
||||
|
||||
if (unlikely(ret < size)) {
|
||||
ret = ret < 0 ? ret : -ENODATA;
|
||||
|
||||
netdev_warn(dev->net,
|
||||
"Failed to read(0x%x) reg index 0x%04x: %d\n",
|
||||
cmd, index, ret);
|
||||
|
||||
ret = ret < 0 ? ret : -ENODATA;
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
||||
@@ -1560,6 +1560,30 @@ vmxnet3_get_hdr_len(struct vmxnet3_adapter *adapter, struct sk_buff *skb,
|
||||
return (hlen + (hdr.tcp->doff << 2));
|
||||
}
|
||||
|
||||
static void
|
||||
vmxnet3_lro_tunnel(struct sk_buff *skb, __be16 ip_proto)
|
||||
{
|
||||
struct udphdr *uh = NULL;
|
||||
|
||||
if (ip_proto == htons(ETH_P_IP)) {
|
||||
struct iphdr *iph = (struct iphdr *)skb->data;
|
||||
|
||||
if (iph->protocol == IPPROTO_UDP)
|
||||
uh = (struct udphdr *)(iph + 1);
|
||||
} else {
|
||||
struct ipv6hdr *iph = (struct ipv6hdr *)skb->data;
|
||||
|
||||
if (iph->nexthdr == IPPROTO_UDP)
|
||||
uh = (struct udphdr *)(iph + 1);
|
||||
}
|
||||
if (uh) {
|
||||
if (uh->check)
|
||||
skb_shinfo(skb)->gso_type |= SKB_GSO_UDP_TUNNEL_CSUM;
|
||||
else
|
||||
skb_shinfo(skb)->gso_type |= SKB_GSO_UDP_TUNNEL;
|
||||
}
|
||||
}
|
||||
|
||||
static int
|
||||
vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
|
||||
struct vmxnet3_adapter *adapter, int quota)
|
||||
@@ -1873,6 +1897,8 @@ sop_done:
|
||||
if (segCnt != 0 && mss != 0) {
|
||||
skb_shinfo(skb)->gso_type = rcd->v4 ?
|
||||
SKB_GSO_TCPV4 : SKB_GSO_TCPV6;
|
||||
if (encap_lro)
|
||||
vmxnet3_lro_tunnel(skb, skb->protocol);
|
||||
skb_shinfo(skb)->gso_size = mss;
|
||||
skb_shinfo(skb)->gso_segs = segCnt;
|
||||
} else if ((segCnt != 0 || skb->len > mtu) && !encap_lro) {
|
||||
|
||||
@@ -364,6 +364,7 @@ static int wg_newlink(struct net *src_net, struct net_device *dev,
|
||||
if (ret < 0)
|
||||
goto err_free_handshake_queue;
|
||||
|
||||
dev_set_threaded(dev, true);
|
||||
ret = register_netdevice(dev);
|
||||
if (ret < 0)
|
||||
goto err_uninit_ratelimiter;
|
||||
|
||||
@@ -937,7 +937,9 @@ static int ath10k_snoc_hif_start(struct ath10k *ar)
|
||||
|
||||
dev_set_threaded(ar->napi_dev, true);
|
||||
ath10k_core_napi_enable(ar);
|
||||
ath10k_snoc_irq_enable(ar);
|
||||
/* IRQs are left enabled when we restart due to a firmware crash */
|
||||
if (!test_bit(ATH10K_SNOC_FLAG_RECOVERY, &ar_snoc->flags))
|
||||
ath10k_snoc_irq_enable(ar);
|
||||
ath10k_snoc_rx_post(ar);
|
||||
|
||||
clear_bit(ATH10K_SNOC_FLAG_RECOVERY, &ar_snoc->flags);
|
||||
|
||||
@@ -855,6 +855,7 @@ void ath11k_fw_stats_init(struct ath11k *ar)
|
||||
INIT_LIST_HEAD(&ar->fw_stats.bcn);
|
||||
|
||||
init_completion(&ar->fw_stats_complete);
|
||||
init_completion(&ar->fw_stats_done);
|
||||
}
|
||||
|
||||
void ath11k_fw_stats_free(struct ath11k_fw_stats *stats)
|
||||
@@ -1811,6 +1812,20 @@ int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab)
|
||||
{
|
||||
int ret;
|
||||
|
||||
switch (ath11k_crypto_mode) {
|
||||
case ATH11K_CRYPT_MODE_SW:
|
||||
set_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags);
|
||||
set_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
|
||||
break;
|
||||
case ATH11K_CRYPT_MODE_HW:
|
||||
clear_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags);
|
||||
clear_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
|
||||
break;
|
||||
default:
|
||||
ath11k_info(ab, "invalid crypto_mode: %d\n", ath11k_crypto_mode);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = ath11k_core_start_firmware(ab, ab->fw_mode);
|
||||
if (ret) {
|
||||
ath11k_err(ab, "failed to start firmware: %d\n", ret);
|
||||
@@ -1829,20 +1844,6 @@ int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab)
|
||||
goto err_firmware_stop;
|
||||
}
|
||||
|
||||
switch (ath11k_crypto_mode) {
|
||||
case ATH11K_CRYPT_MODE_SW:
|
||||
set_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags);
|
||||
set_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
|
||||
break;
|
||||
case ATH11K_CRYPT_MODE_HW:
|
||||
clear_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags);
|
||||
clear_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
|
||||
break;
|
||||
default:
|
||||
ath11k_info(ab, "invalid crypto_mode: %d\n", ath11k_crypto_mode);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (ath11k_frame_mode == ATH11K_HW_TXRX_RAW)
|
||||
set_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
|
||||
|
||||
|
||||
@@ -599,6 +599,8 @@ struct ath11k_fw_stats {
|
||||
struct list_head pdevs;
|
||||
struct list_head vdevs;
|
||||
struct list_head bcn;
|
||||
u32 num_vdev_recvd;
|
||||
u32 num_bcn_recvd;
|
||||
};
|
||||
|
||||
struct ath11k_dbg_htt_stats {
|
||||
@@ -780,7 +782,7 @@ struct ath11k {
|
||||
u8 alpha2[REG_ALPHA2_LEN + 1];
|
||||
struct ath11k_fw_stats fw_stats;
|
||||
struct completion fw_stats_complete;
|
||||
bool fw_stats_done;
|
||||
struct completion fw_stats_done;
|
||||
|
||||
/* protected by conf_mutex */
|
||||
bool ps_state_enable;
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause-Clear
|
||||
/*
|
||||
* Copyright (c) 2018-2020 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
#include <linux/vmalloc.h>
|
||||
@@ -93,57 +93,14 @@ void ath11k_debugfs_add_dbring_entry(struct ath11k *ar,
|
||||
spin_unlock_bh(&dbr_data->lock);
|
||||
}
|
||||
|
||||
static void ath11k_debugfs_fw_stats_reset(struct ath11k *ar)
|
||||
{
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
ar->fw_stats_done = false;
|
||||
ath11k_fw_stats_pdevs_free(&ar->fw_stats.pdevs);
|
||||
ath11k_fw_stats_vdevs_free(&ar->fw_stats.vdevs);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
}
|
||||
|
||||
void ath11k_debugfs_fw_stats_process(struct ath11k *ar, struct ath11k_fw_stats *stats)
|
||||
{
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct ath11k_pdev *pdev;
|
||||
bool is_end;
|
||||
static unsigned int num_vdev, num_bcn;
|
||||
size_t total_vdevs_started = 0;
|
||||
int i;
|
||||
|
||||
/* WMI_REQUEST_PDEV_STAT request has been already processed */
|
||||
|
||||
if (stats->stats_id == WMI_REQUEST_RSSI_PER_CHAIN_STAT) {
|
||||
ar->fw_stats_done = true;
|
||||
return;
|
||||
}
|
||||
|
||||
if (stats->stats_id == WMI_REQUEST_VDEV_STAT) {
|
||||
if (list_empty(&stats->vdevs)) {
|
||||
ath11k_warn(ab, "empty vdev stats");
|
||||
return;
|
||||
}
|
||||
/* FW sends all the active VDEV stats irrespective of PDEV,
|
||||
* hence limit until the count of all VDEVs started
|
||||
*/
|
||||
for (i = 0; i < ab->num_radios; i++) {
|
||||
pdev = rcu_dereference(ab->pdevs_active[i]);
|
||||
if (pdev && pdev->ar)
|
||||
total_vdevs_started += ar->num_started_vdevs;
|
||||
}
|
||||
|
||||
is_end = ((++num_vdev) == total_vdevs_started);
|
||||
|
||||
list_splice_tail_init(&stats->vdevs,
|
||||
&ar->fw_stats.vdevs);
|
||||
|
||||
if (is_end) {
|
||||
ar->fw_stats_done = true;
|
||||
num_vdev = 0;
|
||||
}
|
||||
return;
|
||||
}
|
||||
bool is_end = true;
|
||||
|
||||
/* WMI_REQUEST_PDEV_STAT, WMI_REQUEST_RSSI_PER_CHAIN_STAT and
|
||||
* WMI_REQUEST_VDEV_STAT requests have been already processed.
|
||||
*/
|
||||
if (stats->stats_id == WMI_REQUEST_BCN_STAT) {
|
||||
if (list_empty(&stats->bcn)) {
|
||||
ath11k_warn(ab, "empty bcn stats");
|
||||
@@ -152,97 +109,18 @@ void ath11k_debugfs_fw_stats_process(struct ath11k *ar, struct ath11k_fw_stats *
|
||||
/* Mark end until we reached the count of all started VDEVs
|
||||
* within the PDEV
|
||||
*/
|
||||
is_end = ((++num_bcn) == ar->num_started_vdevs);
|
||||
if (ar->num_started_vdevs)
|
||||
is_end = ((++ar->fw_stats.num_bcn_recvd) ==
|
||||
ar->num_started_vdevs);
|
||||
|
||||
list_splice_tail_init(&stats->bcn,
|
||||
&ar->fw_stats.bcn);
|
||||
|
||||
if (is_end) {
|
||||
ar->fw_stats_done = true;
|
||||
num_bcn = 0;
|
||||
}
|
||||
if (is_end)
|
||||
complete(&ar->fw_stats_done);
|
||||
}
|
||||
}
|
||||
|
||||
static int ath11k_debugfs_fw_stats_request(struct ath11k *ar,
|
||||
struct stats_request_params *req_param)
|
||||
{
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
unsigned long timeout, time_left;
|
||||
int ret;
|
||||
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
/* FW stats can get split when exceeding the stats data buffer limit.
|
||||
* In that case, since there is no end marking for the back-to-back
|
||||
* received 'update stats' event, we keep a 3 seconds timeout in case,
|
||||
* fw_stats_done is not marked yet
|
||||
*/
|
||||
timeout = jiffies + msecs_to_jiffies(3 * 1000);
|
||||
|
||||
ath11k_debugfs_fw_stats_reset(ar);
|
||||
|
||||
reinit_completion(&ar->fw_stats_complete);
|
||||
|
||||
ret = ath11k_wmi_send_stats_request_cmd(ar, req_param);
|
||||
|
||||
if (ret) {
|
||||
ath11k_warn(ab, "could not request fw stats (%d)\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
time_left = wait_for_completion_timeout(&ar->fw_stats_complete, 1 * HZ);
|
||||
|
||||
if (!time_left)
|
||||
return -ETIMEDOUT;
|
||||
|
||||
for (;;) {
|
||||
if (time_after(jiffies, timeout))
|
||||
break;
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
if (ar->fw_stats_done) {
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
break;
|
||||
}
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ath11k_debugfs_get_fw_stats(struct ath11k *ar, u32 pdev_id,
|
||||
u32 vdev_id, u32 stats_id)
|
||||
{
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct stats_request_params req_param;
|
||||
int ret;
|
||||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
|
||||
if (ar->state != ATH11K_STATE_ON) {
|
||||
ret = -ENETDOWN;
|
||||
goto err_unlock;
|
||||
}
|
||||
|
||||
req_param.pdev_id = pdev_id;
|
||||
req_param.vdev_id = vdev_id;
|
||||
req_param.stats_id = stats_id;
|
||||
|
||||
ret = ath11k_debugfs_fw_stats_request(ar, &req_param);
|
||||
if (ret)
|
||||
ath11k_warn(ab, "failed to request fw stats: %d\n", ret);
|
||||
|
||||
ath11k_dbg(ab, ATH11K_DBG_WMI,
|
||||
"debug get fw stat pdev id %d vdev id %d stats id 0x%x\n",
|
||||
pdev_id, vdev_id, stats_id);
|
||||
|
||||
err_unlock:
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath11k_open_pdev_stats(struct inode *inode, struct file *file)
|
||||
{
|
||||
struct ath11k *ar = inode->i_private;
|
||||
@@ -268,7 +146,7 @@ static int ath11k_open_pdev_stats(struct inode *inode, struct file *file)
|
||||
req_param.vdev_id = 0;
|
||||
req_param.stats_id = WMI_REQUEST_PDEV_STAT;
|
||||
|
||||
ret = ath11k_debugfs_fw_stats_request(ar, &req_param);
|
||||
ret = ath11k_mac_fw_stats_request(ar, &req_param);
|
||||
if (ret) {
|
||||
ath11k_warn(ab, "failed to request fw pdev stats: %d\n", ret);
|
||||
goto err_free;
|
||||
@@ -339,7 +217,7 @@ static int ath11k_open_vdev_stats(struct inode *inode, struct file *file)
|
||||
req_param.vdev_id = 0;
|
||||
req_param.stats_id = WMI_REQUEST_VDEV_STAT;
|
||||
|
||||
ret = ath11k_debugfs_fw_stats_request(ar, &req_param);
|
||||
ret = ath11k_mac_fw_stats_request(ar, &req_param);
|
||||
if (ret) {
|
||||
ath11k_warn(ar->ab, "failed to request fw vdev stats: %d\n", ret);
|
||||
goto err_free;
|
||||
@@ -415,7 +293,7 @@ static int ath11k_open_bcn_stats(struct inode *inode, struct file *file)
|
||||
continue;
|
||||
|
||||
req_param.vdev_id = arvif->vdev_id;
|
||||
ret = ath11k_debugfs_fw_stats_request(ar, &req_param);
|
||||
ret = ath11k_mac_fw_stats_request(ar, &req_param);
|
||||
if (ret) {
|
||||
ath11k_warn(ar->ab, "failed to request fw bcn stats: %d\n", ret);
|
||||
goto err_free;
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
|
||||
/*
|
||||
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) 2021-2022, 2025 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef _ATH11K_DEBUGFS_H_
|
||||
@@ -273,8 +273,6 @@ void ath11k_debugfs_unregister(struct ath11k *ar);
|
||||
void ath11k_debugfs_fw_stats_process(struct ath11k *ar, struct ath11k_fw_stats *stats);
|
||||
|
||||
void ath11k_debugfs_fw_stats_init(struct ath11k *ar);
|
||||
int ath11k_debugfs_get_fw_stats(struct ath11k *ar, u32 pdev_id,
|
||||
u32 vdev_id, u32 stats_id);
|
||||
|
||||
static inline bool ath11k_debugfs_is_pktlog_lite_mode_enabled(struct ath11k *ar)
|
||||
{
|
||||
@@ -381,12 +379,6 @@ static inline int ath11k_debugfs_rx_filter(struct ath11k *ar)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int ath11k_debugfs_get_fw_stats(struct ath11k *ar,
|
||||
u32 pdev_id, u32 vdev_id, u32 stats_id)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void
|
||||
ath11k_debugfs_add_dbring_entry(struct ath11k *ar,
|
||||
enum wmi_direct_buffer_module id,
|
||||
|
||||
@@ -8938,6 +8938,86 @@ static void ath11k_mac_put_chain_rssi(struct station_info *sinfo,
|
||||
}
|
||||
}
|
||||
|
||||
static void ath11k_mac_fw_stats_reset(struct ath11k *ar)
|
||||
{
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
ath11k_fw_stats_pdevs_free(&ar->fw_stats.pdevs);
|
||||
ath11k_fw_stats_vdevs_free(&ar->fw_stats.vdevs);
|
||||
ar->fw_stats.num_vdev_recvd = 0;
|
||||
ar->fw_stats.num_bcn_recvd = 0;
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
}
|
||||
|
||||
int ath11k_mac_fw_stats_request(struct ath11k *ar,
|
||||
struct stats_request_params *req_param)
|
||||
{
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
unsigned long time_left;
|
||||
int ret;
|
||||
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
ath11k_mac_fw_stats_reset(ar);
|
||||
|
||||
reinit_completion(&ar->fw_stats_complete);
|
||||
reinit_completion(&ar->fw_stats_done);
|
||||
|
||||
ret = ath11k_wmi_send_stats_request_cmd(ar, req_param);
|
||||
|
||||
if (ret) {
|
||||
ath11k_warn(ab, "could not request fw stats (%d)\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
time_left = wait_for_completion_timeout(&ar->fw_stats_complete, 1 * HZ);
|
||||
if (!time_left)
|
||||
return -ETIMEDOUT;
|
||||
|
||||
/* FW stats can get split when exceeding the stats data buffer limit.
|
||||
* In that case, since there is no end marking for the back-to-back
|
||||
* received 'update stats' event, we keep a 3 seconds timeout in case,
|
||||
* fw_stats_done is not marked yet
|
||||
*/
|
||||
time_left = wait_for_completion_timeout(&ar->fw_stats_done, 3 * HZ);
|
||||
if (!time_left)
|
||||
return -ETIMEDOUT;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath11k_mac_get_fw_stats(struct ath11k *ar, u32 pdev_id,
|
||||
u32 vdev_id, u32 stats_id)
|
||||
{
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct stats_request_params req_param;
|
||||
int ret;
|
||||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
|
||||
if (ar->state != ATH11K_STATE_ON) {
|
||||
ret = -ENETDOWN;
|
||||
goto err_unlock;
|
||||
}
|
||||
|
||||
req_param.pdev_id = pdev_id;
|
||||
req_param.vdev_id = vdev_id;
|
||||
req_param.stats_id = stats_id;
|
||||
|
||||
ret = ath11k_mac_fw_stats_request(ar, &req_param);
|
||||
if (ret)
|
||||
ath11k_warn(ab, "failed to request fw stats: %d\n", ret);
|
||||
|
||||
ath11k_dbg(ab, ATH11K_DBG_WMI,
|
||||
"debug get fw stat pdev id %d vdev id %d stats id 0x%x\n",
|
||||
pdev_id, vdev_id, stats_id);
|
||||
|
||||
err_unlock:
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ath11k_mac_op_sta_statistics(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta,
|
||||
@@ -8975,8 +9055,8 @@ static void ath11k_mac_op_sta_statistics(struct ieee80211_hw *hw,
|
||||
if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_CHAIN_SIGNAL)) &&
|
||||
arsta->arvif->vdev_type == WMI_VDEV_TYPE_STA &&
|
||||
ar->ab->hw_params.supports_rssi_stats &&
|
||||
!ath11k_debugfs_get_fw_stats(ar, ar->pdev->pdev_id, 0,
|
||||
WMI_REQUEST_RSSI_PER_CHAIN_STAT)) {
|
||||
!ath11k_mac_get_fw_stats(ar, ar->pdev->pdev_id, 0,
|
||||
WMI_REQUEST_RSSI_PER_CHAIN_STAT)) {
|
||||
ath11k_mac_put_chain_rssi(sinfo, arsta, "fw stats", true);
|
||||
}
|
||||
|
||||
@@ -8984,8 +9064,8 @@ static void ath11k_mac_op_sta_statistics(struct ieee80211_hw *hw,
|
||||
if (!signal &&
|
||||
arsta->arvif->vdev_type == WMI_VDEV_TYPE_STA &&
|
||||
ar->ab->hw_params.supports_rssi_stats &&
|
||||
!(ath11k_debugfs_get_fw_stats(ar, ar->pdev->pdev_id, 0,
|
||||
WMI_REQUEST_VDEV_STAT)))
|
||||
!(ath11k_mac_get_fw_stats(ar, ar->pdev->pdev_id, 0,
|
||||
WMI_REQUEST_VDEV_STAT)))
|
||||
signal = arsta->rssi_beacon;
|
||||
|
||||
ath11k_dbg(ar->ab, ATH11K_DBG_MAC,
|
||||
@@ -9331,11 +9411,13 @@ static int ath11k_fw_stats_request(struct ath11k *ar,
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
ar->fw_stats_done = false;
|
||||
ath11k_fw_stats_pdevs_free(&ar->fw_stats.pdevs);
|
||||
ar->fw_stats.num_vdev_recvd = 0;
|
||||
ar->fw_stats.num_bcn_recvd = 0;
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
reinit_completion(&ar->fw_stats_complete);
|
||||
reinit_completion(&ar->fw_stats_done);
|
||||
|
||||
ret = ath11k_wmi_send_stats_request_cmd(ar, req_param);
|
||||
if (ret) {
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
|
||||
/*
|
||||
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) 2021-2023, 2025 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef ATH11K_MAC_H
|
||||
@@ -179,4 +179,6 @@ int ath11k_mac_vif_set_keepalive(struct ath11k_vif *arvif,
|
||||
void ath11k_mac_fill_reg_tpc_info(struct ath11k *ar,
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_chanctx_conf *ctx);
|
||||
int ath11k_mac_fw_stats_request(struct ath11k *ar,
|
||||
struct stats_request_params *req_param);
|
||||
#endif
|
||||
|
||||
@@ -8157,6 +8157,11 @@ static void ath11k_peer_assoc_conf_event(struct ath11k_base *ab, struct sk_buff
|
||||
static void ath11k_update_stats_event(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct ath11k_fw_stats stats = {};
|
||||
size_t total_vdevs_started = 0;
|
||||
struct ath11k_pdev *pdev;
|
||||
bool is_end = true;
|
||||
int i;
|
||||
|
||||
struct ath11k *ar;
|
||||
int ret;
|
||||
|
||||
@@ -8183,18 +8188,50 @@ static void ath11k_update_stats_event(struct ath11k_base *ab, struct sk_buff *sk
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
|
||||
/* WMI_REQUEST_PDEV_STAT can be requested via .get_txpower mac ops or via
|
||||
/* WMI_REQUEST_PDEV_STAT, WMI_REQUEST_VDEV_STAT and
|
||||
* WMI_REQUEST_RSSI_PER_CHAIN_STAT can be requested via mac ops or via
|
||||
* debugfs fw stats. Therefore, processing it separately.
|
||||
*/
|
||||
if (stats.stats_id == WMI_REQUEST_PDEV_STAT) {
|
||||
list_splice_tail_init(&stats.pdevs, &ar->fw_stats.pdevs);
|
||||
ar->fw_stats_done = true;
|
||||
complete(&ar->fw_stats_done);
|
||||
goto complete;
|
||||
}
|
||||
|
||||
/* WMI_REQUEST_VDEV_STAT, WMI_REQUEST_BCN_STAT and WMI_REQUEST_RSSI_PER_CHAIN_STAT
|
||||
* are currently requested only via debugfs fw stats. Hence, processing these
|
||||
* in debugfs context
|
||||
if (stats.stats_id == WMI_REQUEST_RSSI_PER_CHAIN_STAT) {
|
||||
complete(&ar->fw_stats_done);
|
||||
goto complete;
|
||||
}
|
||||
|
||||
if (stats.stats_id == WMI_REQUEST_VDEV_STAT) {
|
||||
if (list_empty(&stats.vdevs)) {
|
||||
ath11k_warn(ab, "empty vdev stats");
|
||||
goto complete;
|
||||
}
|
||||
/* FW sends all the active VDEV stats irrespective of PDEV,
|
||||
* hence limit until the count of all VDEVs started
|
||||
*/
|
||||
for (i = 0; i < ab->num_radios; i++) {
|
||||
pdev = rcu_dereference(ab->pdevs_active[i]);
|
||||
if (pdev && pdev->ar)
|
||||
total_vdevs_started += ar->num_started_vdevs;
|
||||
}
|
||||
|
||||
if (total_vdevs_started)
|
||||
is_end = ((++ar->fw_stats.num_vdev_recvd) ==
|
||||
total_vdevs_started);
|
||||
|
||||
list_splice_tail_init(&stats.vdevs,
|
||||
&ar->fw_stats.vdevs);
|
||||
|
||||
if (is_end)
|
||||
complete(&ar->fw_stats_done);
|
||||
|
||||
goto complete;
|
||||
}
|
||||
|
||||
/* WMI_REQUEST_BCN_STAT is currently requested only via debugfs fw stats.
|
||||
* Hence, processing it in debugfs context
|
||||
*/
|
||||
ath11k_debugfs_fw_stats_process(ar, &stats);
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause-Clear
|
||||
/*
|
||||
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
#include <linux/dma-mapping.h>
|
||||
#include "hal_tx.h"
|
||||
@@ -547,9 +547,9 @@ static int ath12k_hal_srng_create_config_qcn9274(struct ath12k_base *ab)
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_HP;
|
||||
|
||||
s = &hal->srng_config[HAL_TCL_DATA];
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB;
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB(ab);
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_HP;
|
||||
s->reg_size[0] = HAL_TCL2_RING_BASE_LSB - HAL_TCL1_RING_BASE_LSB;
|
||||
s->reg_size[0] = HAL_TCL2_RING_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB(ab);
|
||||
s->reg_size[1] = HAL_TCL2_RING_HP - HAL_TCL1_RING_HP;
|
||||
|
||||
s = &hal->srng_config[HAL_TCL_CMD];
|
||||
@@ -561,29 +561,29 @@ static int ath12k_hal_srng_create_config_qcn9274(struct ath12k_base *ab)
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_HP;
|
||||
|
||||
s = &hal->srng_config[HAL_CE_SRC];
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_BASE_LSB;
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_HP;
|
||||
s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_SRC_REG;
|
||||
s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_SRC_REG;
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP;
|
||||
s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
|
||||
s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
|
||||
|
||||
s = &hal->srng_config[HAL_CE_DST];
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_BASE_LSB;
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_HP;
|
||||
s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
|
||||
s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP;
|
||||
s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
|
||||
s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
|
||||
|
||||
s = &hal->srng_config[HAL_CE_DST_STATUS];
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG +
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) +
|
||||
HAL_CE_DST_STATUS_RING_BASE_LSB;
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_STATUS_RING_HP;
|
||||
s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
|
||||
s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP;
|
||||
s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
|
||||
s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
|
||||
|
||||
s = &hal->srng_config[HAL_WBM_IDLE_LINK];
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab);
|
||||
@@ -1353,9 +1353,9 @@ static int ath12k_hal_srng_create_config_wcn7850(struct ath12k_base *ab)
|
||||
|
||||
s = &hal->srng_config[HAL_TCL_DATA];
|
||||
s->max_rings = 5;
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB;
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB(ab);
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_HP;
|
||||
s->reg_size[0] = HAL_TCL2_RING_BASE_LSB - HAL_TCL1_RING_BASE_LSB;
|
||||
s->reg_size[0] = HAL_TCL2_RING_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB(ab);
|
||||
s->reg_size[1] = HAL_TCL2_RING_HP - HAL_TCL1_RING_HP;
|
||||
|
||||
s = &hal->srng_config[HAL_TCL_CMD];
|
||||
@@ -1368,31 +1368,31 @@ static int ath12k_hal_srng_create_config_wcn7850(struct ath12k_base *ab)
|
||||
|
||||
s = &hal->srng_config[HAL_CE_SRC];
|
||||
s->max_rings = 12;
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_BASE_LSB;
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_HP;
|
||||
s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_SRC_REG;
|
||||
s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_SRC_REG;
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP;
|
||||
s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
|
||||
s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
|
||||
|
||||
s = &hal->srng_config[HAL_CE_DST];
|
||||
s->max_rings = 12;
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_BASE_LSB;
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_HP;
|
||||
s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
|
||||
s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP;
|
||||
s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
|
||||
s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
|
||||
|
||||
s = &hal->srng_config[HAL_CE_DST_STATUS];
|
||||
s->max_rings = 12;
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG +
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) +
|
||||
HAL_CE_DST_STATUS_RING_BASE_LSB;
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_STATUS_RING_HP;
|
||||
s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
|
||||
s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
|
||||
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP;
|
||||
s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
|
||||
s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
|
||||
HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
|
||||
|
||||
s = &hal->srng_config[HAL_WBM_IDLE_LINK];
|
||||
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab);
|
||||
@@ -1737,7 +1737,7 @@ static void ath12k_hal_srng_src_hw_init(struct ath12k_base *ab,
|
||||
HAL_TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB) |
|
||||
u32_encode_bits((srng->entry_size * srng->num_entries),
|
||||
HAL_TCL1_RING_BASE_MSB_RING_SIZE);
|
||||
ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_BASE_MSB_OFFSET, val);
|
||||
ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_BASE_MSB_OFFSET(ab), val);
|
||||
|
||||
val = u32_encode_bits(srng->entry_size, HAL_REO1_RING_ID_ENTRY_SIZE);
|
||||
ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_ID_OFFSET(ab), val);
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
|
||||
/*
|
||||
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef ATH12K_HAL_H
|
||||
@@ -44,10 +44,14 @@ struct ath12k_base;
|
||||
#define HAL_SEQ_WCSS_UMAC_OFFSET 0x00a00000
|
||||
#define HAL_SEQ_WCSS_UMAC_REO_REG 0x00a38000
|
||||
#define HAL_SEQ_WCSS_UMAC_TCL_REG 0x00a44000
|
||||
#define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG 0x01b80000
|
||||
#define HAL_SEQ_WCSS_UMAC_CE0_DST_REG 0x01b81000
|
||||
#define HAL_SEQ_WCSS_UMAC_CE1_SRC_REG 0x01b82000
|
||||
#define HAL_SEQ_WCSS_UMAC_CE1_DST_REG 0x01b83000
|
||||
#define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) \
|
||||
((ab)->hw_params->regs->hal_umac_ce0_src_reg_base)
|
||||
#define HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) \
|
||||
((ab)->hw_params->regs->hal_umac_ce0_dest_reg_base)
|
||||
#define HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) \
|
||||
((ab)->hw_params->regs->hal_umac_ce1_src_reg_base)
|
||||
#define HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) \
|
||||
((ab)->hw_params->regs->hal_umac_ce1_dest_reg_base)
|
||||
#define HAL_SEQ_WCSS_UMAC_WBM_REG 0x00a34000
|
||||
|
||||
#define HAL_CE_WFSS_CE_REG_BASE 0x01b80000
|
||||
@@ -57,8 +61,10 @@ struct ath12k_base;
|
||||
/* SW2TCL(x) R0 ring configuration address */
|
||||
#define HAL_TCL1_RING_CMN_CTRL_REG 0x00000020
|
||||
#define HAL_TCL1_RING_DSCP_TID_MAP 0x00000240
|
||||
#define HAL_TCL1_RING_BASE_LSB 0x00000900
|
||||
#define HAL_TCL1_RING_BASE_MSB 0x00000904
|
||||
#define HAL_TCL1_RING_BASE_LSB(ab) \
|
||||
((ab)->hw_params->regs->hal_tcl1_ring_base_lsb)
|
||||
#define HAL_TCL1_RING_BASE_MSB(ab) \
|
||||
((ab)->hw_params->regs->hal_tcl1_ring_base_msb)
|
||||
#define HAL_TCL1_RING_ID(ab) ((ab)->hw_params->regs->hal_tcl1_ring_id)
|
||||
#define HAL_TCL1_RING_MISC(ab) \
|
||||
((ab)->hw_params->regs->hal_tcl1_ring_misc)
|
||||
@@ -76,30 +82,31 @@ struct ath12k_base;
|
||||
((ab)->hw_params->regs->hal_tcl1_ring_msi1_base_msb)
|
||||
#define HAL_TCL1_RING_MSI1_DATA(ab) \
|
||||
((ab)->hw_params->regs->hal_tcl1_ring_msi1_data)
|
||||
#define HAL_TCL2_RING_BASE_LSB 0x00000978
|
||||
#define HAL_TCL2_RING_BASE_LSB(ab) \
|
||||
((ab)->hw_params->regs->hal_tcl2_ring_base_lsb)
|
||||
#define HAL_TCL_RING_BASE_LSB(ab) \
|
||||
((ab)->hw_params->regs->hal_tcl_ring_base_lsb)
|
||||
|
||||
#define HAL_TCL1_RING_MSI1_BASE_LSB_OFFSET(ab) \
|
||||
(HAL_TCL1_RING_MSI1_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB)
|
||||
#define HAL_TCL1_RING_MSI1_BASE_MSB_OFFSET(ab) \
|
||||
(HAL_TCL1_RING_MSI1_BASE_MSB(ab) - HAL_TCL1_RING_BASE_LSB)
|
||||
#define HAL_TCL1_RING_MSI1_DATA_OFFSET(ab) \
|
||||
(HAL_TCL1_RING_MSI1_DATA(ab) - HAL_TCL1_RING_BASE_LSB)
|
||||
#define HAL_TCL1_RING_BASE_MSB_OFFSET \
|
||||
(HAL_TCL1_RING_BASE_MSB - HAL_TCL1_RING_BASE_LSB)
|
||||
#define HAL_TCL1_RING_ID_OFFSET(ab) \
|
||||
(HAL_TCL1_RING_ID(ab) - HAL_TCL1_RING_BASE_LSB)
|
||||
#define HAL_TCL1_RING_CONSR_INT_SETUP_IX0_OFFSET(ab) \
|
||||
(HAL_TCL1_RING_CONSUMER_INT_SETUP_IX0(ab) - HAL_TCL1_RING_BASE_LSB)
|
||||
#define HAL_TCL1_RING_CONSR_INT_SETUP_IX1_OFFSET(ab) \
|
||||
(HAL_TCL1_RING_CONSUMER_INT_SETUP_IX1(ab) - HAL_TCL1_RING_BASE_LSB)
|
||||
#define HAL_TCL1_RING_TP_ADDR_LSB_OFFSET(ab) \
|
||||
(HAL_TCL1_RING_TP_ADDR_LSB(ab) - HAL_TCL1_RING_BASE_LSB)
|
||||
#define HAL_TCL1_RING_TP_ADDR_MSB_OFFSET(ab) \
|
||||
(HAL_TCL1_RING_TP_ADDR_MSB(ab) - HAL_TCL1_RING_BASE_LSB)
|
||||
#define HAL_TCL1_RING_MISC_OFFSET(ab) \
|
||||
(HAL_TCL1_RING_MISC(ab) - HAL_TCL1_RING_BASE_LSB)
|
||||
#define HAL_TCL1_RING_MSI1_BASE_LSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
|
||||
(HAL_TCL1_RING_MSI1_BASE_LSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
|
||||
#define HAL_TCL1_RING_MSI1_BASE_MSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
|
||||
(HAL_TCL1_RING_MSI1_BASE_MSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
|
||||
#define HAL_TCL1_RING_MSI1_DATA_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
|
||||
(HAL_TCL1_RING_MSI1_DATA(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
|
||||
#define HAL_TCL1_RING_BASE_MSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
|
||||
(HAL_TCL1_RING_BASE_MSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
|
||||
#define HAL_TCL1_RING_ID_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
|
||||
(HAL_TCL1_RING_ID(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
|
||||
#define HAL_TCL1_RING_CONSR_INT_SETUP_IX0_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
|
||||
(HAL_TCL1_RING_CONSUMER_INT_SETUP_IX0(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
|
||||
#define HAL_TCL1_RING_CONSR_INT_SETUP_IX1_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
|
||||
(HAL_TCL1_RING_CONSUMER_INT_SETUP_IX1(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
|
||||
#define HAL_TCL1_RING_TP_ADDR_LSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
|
||||
(HAL_TCL1_RING_TP_ADDR_LSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
|
||||
#define HAL_TCL1_RING_TP_ADDR_MSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
|
||||
(HAL_TCL1_RING_TP_ADDR_MSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
|
||||
#define HAL_TCL1_RING_MISC_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
|
||||
(HAL_TCL1_RING_MISC(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
|
||||
|
||||
/* SW2TCL(x) R2 ring pointers (head/tail) address */
|
||||
#define HAL_TCL1_RING_HP 0x00002000
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user