# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/nuvoton,ma35d1-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Nuvoton MA35D1 pin control and GPIO

maintainers:
  - Shan-Chun Hung <schung@nuvoton.com>
  - Jacky Huang <ychuang3@nuvoton.com>

allOf:
  - $ref: pinctrl.yaml#

properties:
  compatible:
    enum:
      - nuvoton,ma35d1-pinctrl

  reg:
    maxItems: 1

  '#address-cells':
    const: 1

  '#size-cells':
    const: 1

  nuvoton,sys:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      phandle of the system-management node.

  ranges: true

patternProperties:
  "^gpio@[0-9a-f]+$":
    type: object
    properties:
      gpio-controller: true

      '#gpio-cells':
        const: 2

      reg:
        maxItems: 1

      clocks:
        maxItems: 1

      interrupt-controller: true

      '#interrupt-cells':
        const: 2

      interrupts:
        description:
          The interrupt outputs to sysirq.
        maxItems: 1

    required:
      - gpio-controller
      - '#gpio-cells'
      - reg
      - clocks
      - interrupt-controller
      - '#interrupt-cells'
      - interrupts

    additionalProperties: false

  "-grp$":
    type: object
    description:
      Pinctrl node's client devices use subnodes for desired pin configuration.
      Client device subnodes use below standard properties.
    patternProperties:
      "-pins$":
        type: object
        description:
          A pinctrl node should contain at least one subnodes representing the
          pinctrl groups available on the machine. Each subnode will list the
          pins it needs, and how they should be configured, with regard to muxer
          configuration, pullups, drive strength, input enable/disable and input
          schmitt.
        $ref: /schemas/pinctrl/pincfg-node.yaml

        properties:
          nuvoton,pins:
            description:
              Each entry consists of 4 parameters and represents the mux and config
              setting for one pin.
            $ref: /schemas/types.yaml#/definitions/uint32-matrix
            minItems: 1
            items:
              items:
                - minimum: 0
                  maximum: 13
                  description:
                    Pin bank.
                - minimum: 0
                  maximum: 15
                  description:
                    Pin bank index.
                - minimum: 0
                  maximum: 15
                  description:
                    Mux 0 means GPIO and mux 1 to 15 means the specific device function.

          power-source:
            description: |
              Valid arguments are described as below:
              0: power supply of 1.8V
              1: power supply of 3.3V
            enum: [0, 1]

          drive-strength-microamp:
            oneOf:
              - enum: [ 2900, 4400, 5800, 7300, 8600, 10100, 11500, 13000 ]
                description: 1.8V I/O driving strength
              - enum: [ 17100, 25600, 34100, 42800, 48000, 56000, 77000, 82000 ]
                description: 3.3V I/O driving strength

          bias-disable: true

          bias-pull-up: true

          bias-pull-down: true

          input-schmitt-disable: true

        additionalProperties: false

    additionalProperties: false

required:
  - compatible
  - reg
  - nuvoton,sys

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>

    pinctrl@40040000 {
        compatible = "nuvoton,ma35d1-pinctrl";
        reg = <0x40040000 0xc00>;
        #address-cells = <1>;
        #size-cells = <1>;
        nuvoton,sys = <&sys>;
        ranges = <0x0 0x40040000 0x400>;

        gpio@0 {
            reg = <0x0 0x40>;
            interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clk GPA_GATE>;
            gpio-controller;
            #gpio-cells = <2>;
            interrupt-controller;
            #interrupt-cells = <2>;
        };

        uart-grp {
            uart11-pins {
                nuvoton,pins = <11 0 2>,
                               <11 1 2>,
                               <11 2 2>,
                               <11 3 2>;
                power-source = <1>;
                bias-disable;
            };
        };
    };
