# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Faraday Technology FTGMAC100 gigabit ethernet controller

allOf:
  - $ref: ethernet-controller.yaml#

maintainers:
  - Po-Yu Chuang <ratbert@faraday-tech.com>

properties:
  compatible:
    oneOf:
      - const: faraday,ftgmac100
      - items:
          - enum:
              - aspeed,ast2400-mac
              - aspeed,ast2500-mac
              - aspeed,ast2600-mac
          - const: faraday,ftgmac100

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    minItems: 1
    items:
      - description: MAC IP clock
      - description: RMII RCLK gate for AST2500/2600

  clock-names:
    minItems: 1
    items:
      - const: MACCLK
      - const: RCLK

  phy-mode:
    enum:
      - rgmii
      - rmii

  phy-handle: true

  use-ncsi:
    description:
      Use the NC-SI stack instead of an MDIO PHY. Currently assumes
      rmii (100bT) but kept as a separate property in case NC-SI grows support
      for a gigabit link.
    type: boolean

  no-hw-checksum:
    description:
      Used to disable HW checksum support. Here for backward
      compatibility as the driver now should have correct defaults based on
      the SoC.
    type: boolean
    deprecated: true

  mdio:
    $ref: /schemas/net/mdio.yaml#

required:
  - compatible
  - reg
  - interrupts

unevaluatedProperties: false

examples:
  - |
    ethernet@1e660000 {
        compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
        reg = <0x1e660000 0x180>;
        interrupts = <2>;
        use-ncsi;
    };

    ethernet@1e680000 {
        compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
        reg = <0x1e680000 0x180>;
        interrupts = <2>;

        phy-handle = <&phy>;
        phy-mode = "rgmii";

        mdio {
            #address-cells = <1>;
            #size-cells = <0>;

            phy: ethernet-phy@1 {
                compatible = "ethernet-phy-ieee802.3-c22";
                reg = <1>;
            };
        };
    };
