# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/nuvoton,ma35d1-sdhci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Nuvoton MA35D1 SD/SDIO/MMC Controller

maintainers:
  - Shan-Chun Hung <shanchun1218@gmail.com>

allOf:
  - $ref: sdhci-common.yaml#

properties:
  compatible:
    enum:
      - nuvoton,ma35d1-sdhci

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  pinctrl-names:
    minItems: 1
    items:
      - const: default
      - const: state_uhs

  pinctrl-0:
    description:
      Should contain default/high speed pin ctrl.
    maxItems: 1

  pinctrl-1:
    description:
      Should contain uhs mode pin ctrl.
    maxItems: 1

  resets:
    maxItems: 1

  nuvoton,sys:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: phandle to access GCR (Global Control Register) registers.

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - pinctrl-names
  - pinctrl-0
  - resets
  - nuvoton,sys

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
    #include <dt-bindings/reset/nuvoton,ma35d1-reset.h>

    soc {
        #address-cells = <2>;
        #size-cells = <2>;
        mmc@40190000 {
            compatible = "nuvoton,ma35d1-sdhci";
            reg = <0x0 0x40190000 0x0 0x2000>;
            interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clk SDH1_GATE>;
            pinctrl-names = "default", "state_uhs";
            pinctrl-0 = <&pinctrl_sdhci1>;
            pinctrl-1 = <&pinctrl_sdhci1_uhs>;
            resets = <&sys MA35D1_RESET_SDH1>;
            nuvoton,sys = <&sys>;
            vqmmc-supply = <&sdhci1_vqmmc_regulator>;
            bus-width = <8>;
            max-frequency = <200000000>;
        };
    };
