# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Common Properties for Synopsys DesignWare HDMI TX Controller

maintainers:
  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

description: |
  This document defines device tree properties for the Synopsys DesignWare HDMI
  TX controller (DWC HDMI TX) IP core. It doesn't constitute a full device tree
  binding specification by itself but is meant to be referenced by device tree
  bindings for the platform-specific integrations of the DWC HDMI TX.

  When referenced from platform device tree bindings the properties defined in
  this document are defined as follows. The platform device tree bindings are
  responsible for defining whether each property is required or optional.

properties:
  reg:
    maxItems: 1

  reg-io-width:
    description:
      Width (in bytes) of the registers specified by the reg property.
    enum: [1, 4]
    default: 1

  clocks:
    minItems: 2
    maxItems: 5
    items:
      - description: The bus clock for either AHB and APB
      - description: The internal register configuration clock
    additionalItems: true

  clock-names:
    minItems: 2
    maxItems: 5
    items:
      - const: iahb
      - const: isfr
    additionalItems: true

  ddc-i2c-bus:
    $ref: /schemas/types.yaml#/definitions/phandle
    deprecated: true
    description:
      The HDMI DDC bus can be connected to either a system I2C master or the
      functionally-reduced I2C master contained in the DWC HDMI. When connected
      to a system I2C master this property contains a phandle to that I2C
      master controller.

      This property is deprecated, the system I2C master controller should
      be referenced through the ddc-i2c-bus property of the HDMI connector
      node.

  interrupts:
    maxItems: 1

additionalProperties: true

...
