# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nvidia,tegra20-ac97.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NVIDIA Tegra20 AC97 controller

maintainers:
  - Thierry Reding <treding@nvidia.com>
  - Jon Hunter <jonathanh@nvidia.com>

properties:
  compatible:
    const: nvidia,tegra20-ac97

  reg:
    maxItems: 1

  resets:
    maxItems: 1

  reset-names:
    const: ac97

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  dmas:
    maxItems: 2

  dma-names:
    items:
      - const: rx
      - const: tx

  nvidia,codec-reset-gpios:
    description: Reset pin of external AC97 codec
    maxItems: 1

  nvidia,codec-sync-gpios:
    description: AC97 DAP _FS line
    maxItems: 1

required:
  - compatible
  - reg
  - resets
  - reset-names
  - interrupts
  - clocks
  - dmas
  - dma-names
  - nvidia,codec-reset-gpios
  - nvidia,codec-sync-gpios

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/tegra20-car.h>
    #include <dt-bindings/gpio/tegra-gpio.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/gpio/gpio.h>

    ac97@70002000 {
        compatible = "nvidia,tegra20-ac97";
        reg = <0x70002000 0x200>;
        resets = <&tegra_car 3>;
        reset-names = "ac97";
        interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&tegra_car 3>;
        dmas = <&apbdma 12>, <&apbdma 12>;
        dma-names = "rx", "tx";
        nvidia,codec-reset-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
        nvidia,codec-sync-gpios = <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
    };
...
