# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---

$id: http://devicetree.org/schemas/phy/qcom,hdmi-phy-other.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Adreno/Snapdragon HDMI phy

maintainers:
  - Rob Clark <robdclark@gmail.com>

properties:
  compatible:
    enum:
      - qcom,hdmi-phy-8660
      - qcom,hdmi-phy-8960
      - qcom,hdmi-phy-8974
      - qcom,hdmi-phy-8084

  reg:
    maxItems: 2

  reg-names:
    items:
      - const: hdmi_phy
      - const: hdmi_pll

  clocks:
    minItems: 1
    maxItems: 2

  clock-names:
    minItems: 1
    maxItems: 2

  power-domains:
    maxItems: 1

  core-vdda-supply:
    description: phandle to VDDA supply regulator

  vddio-supply:
    description: phandle to VDD I/O supply regulator

  '#clock-cells':
    const: 0

  '#phy-cells':
    const: 0

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,hdmi-phy-8660
    then:
      properties:
        clocks:
          maxItems: 1
        clock-names:
          items:
            - const: slave_iface
        vddio-supply: false

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,hdmi-phy-8960
    then:
      properties:
        clocks:
          minItems: 1
          maxItems: 2
        clock-names:
          minItems: 1
          items:
            - const: slave_iface
            - const: pxo
        vddio-supply: false

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,hdmi-phy-8084
              - qcom,hdmi-phy-8974
    then:
      properties:
        clocks:
          maxItems: 2
        clock-names:
          items:
            - const: iface
            - const: alt_iface

required:
  - compatible
  - clocks
  - reg
  - reg-names
  - '#phy-cells'

additionalProperties: false

examples:
  - |
    hdmi_phy: phy@4a00400 {
      compatible = "qcom,hdmi-phy-8960";
      reg-names = "hdmi_phy",
                  "hdmi_pll";
      reg = <0x4a00400 0x60>,
            <0x4a00500 0x100>;
      #clock-cells = <0>;
      #phy-cells = <0>;
      power-domains = <&mmcc 1>;
      clock-names = "slave_iface", "pxo";
      clocks = <&clk 21>, <&pxo_board>;
      core-vdda-supply = <&pm8921_hdmi_mvs>;
    };
